Leakage–delay tradeoff in FinFET logic circuits: A comparative analysis with bulk technology

M Agostinelli, M Alioto, D Esseni… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
In this paper, we study the advantages offered by multi-gate fin FETs (FinFETs) over
traditional bulk MOSFETs when low standby power circuit techniques are implemented …

Characterization and modeling of current transport in metal/ferroelectric/semiconductor tunnel junctions

G Franchini, AS Spinelli, G Nicosia… - … on Electron Devices, 2020 - ieeexplore.ieee.org
Although metal/ferroelectric/semiconductor tunnel junctions have been attracting
widespread interest as next-generation memory devices, only limited effort has been …

A general simulation procedure for the electrical characteristics of metal-insulator-semiconductor tunnel structures

MI Vexler, SE Tyaginov, YY Illarionov, YK Sing… - Semiconductors, 2013 - Springer
The algorithm is suggested for calculating the I–V characteristics of a voltage-or current-
controlled metal-tunnel-thin insulator-semiconductor system. The basic underlying physical …

Current Tunnelling in MOS Devices with Al2O3/SiO2 Gate Dielectric

A Bouazra, SAB Nasrallah, M Said… - Physics Research …, 2008 - Wiley Online Library
With the continued scaling of the SiO2 thickness below 2 nm in CMOS devices, a large direct‐
tunnelling current flow between the gate electrode and silicon substrate is greatly impacting …

A comparison of modeling approaches for current transport in polysilicon-channel nanowire and macaroni GAA MOSFETs

A Mannara, G Malavena… - Journal of …, 2021 - Springer
In this paper, we compare quantitatively the results obtained from the numerical simulation
of current transport in polysilicon-channel MOSFETs under different modeling assumptions …

Modeling of ferroelectric tunnel junctions based on the Pt/BaTiO3/Nb: SrTiO3 stack

M Dossena, G Malavena, AS Spinelli… - Journal of Applied …, 2022 - pubs.aip.org
In this paper, we report a comprehensive modeling investigation of the Pt/BaTiO 3/Nb: SrTiO
3 stack designed to operate as a Ferroelectric Tunnel Junction (FTJ). The analysis accounts …

A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs

P Palestri, C Alexander, A Asenov, V Aubry-Fortuna… - Solid-state …, 2009 - Elsevier
In this paper we compare advanced modeling approaches for the determination of the drain
current in nanoscale MOSFETs. Transport models range from drift–diffusion to direct …

Analytical modeling of tunneling current through SiO2–HfO2 stacks in metal oxide semiconductor structures

J Coignus, R Clerc, C Leroux, G Reimbold… - Journal of Vacuum …, 2009 - pubs.aip.org
This work presents an original approach to model direct tunneling current through high-κ
dielectrics including Si O 2 interfacial oxide from electron inversion layers. Quantum …

Unified tunnelling-diffusion theory for Schottky and very thin MOS structures

J Racko, P Valent, P Benko, D Donoval, L Harmatha… - Solid-state …, 2008 - Elsevier
We derive general formulae for calculating the transport of free charge carriers in a MOS
structure with a thin insulating layer. In particular, we obtain relationships for boundary …

Modeling and simulation approaches for gate current computation

B Majkusiak, P Palestri, A Schenk… - Nanoscale CMOS …, 2010 - re.public.polimi.it
This book provides a comprehensive review of the state-of-the-art in the development of new
and innovative materials, and of advanced modeling and characterization methods for …