In this paper, we study nonblocking supervisory control of discrete event systems under
partial observation. A nonblocking supervisor can be synthesized for the supremal Lm (G) …

The paper presents a new architecture for systems based on run-time reconfigured shared
memory processor clusters meant for implementation using network on chip technology …

The paper presents an analysis of the suitability of the architecture of dynamic SMP clusters
with communication on the fly for massively parallel fine grain numerical computations. It is …

The paper concerns task graph scheduling in parallel programs for a parallel architecture
based on dynamic SMP processor clusters with data transmissions on the fly. The assumed …

This paper concerns numerical computations in a new shared memory system architecture
oriented towards systems on chip technology. Dynamically reconfigurable processor …

This paper presents a new version of the dynamic SMP cluster-based architecture oriented
towards networks on chip implementation technique. Smaller sub-networks with many …

The paper presents a study of medium and coarse grain numerical computations in a new
cluster-based shared memory parallel architecture oriented into implementation in" Systems …

This paper evaluates new architectural solutions for data communication in shared memory
parallel systems. These solutions enable creation of run-time reconfigurable processor …

The paper concerns task graph scheduling in parallel programs using the concept of
moldable computational tasks for a parallel architecture based on dynamic SMP processor …

This paper evaluates new architectural solutions for data communication in shared memory
parallel systems. These solutions enable creation of run-time reconfigurable processor …