Making use of manufacturing process variations: A do**less transistor based-PUF for hardware-assisted security
Time to market is a vital aspect of electronic product development. When it comes to device
technology, the time needed for the device fabrication processes to stabilize is relatively …
technology, the time needed for the device fabrication processes to stabilize is relatively …
Radiation study of TFET and JLFET-based devices and circuits: a comprehensive review on the device structure and sensitivity
All electronic devices when used in a radiation environment undergo significant changes in
their electrical properties. It is interesting to explore the effects of radiation, not only on …
their electrical properties. It is interesting to explore the effects of radiation, not only on …
Static and quasi-static drain current modeling of tri-gate junctionless transistor with substrate bias-induced effects
In this paper, a surface potential-based drain current model is developed to explore the
static and quasi-static performance of substrate-biased tri-gate junctionless field-effect …
static and quasi-static performance of substrate-biased tri-gate junctionless field-effect …
Parametric investigation and design of junctionless nanowire tunnel field effect transistor
An integrated design based on Gate-All-Around (GAA) silicon Junctionless (JL) vertical
profile Nanowire (NW) structure has been proposed for JL-NW-Tunnel-Field Effect Transistor …
profile Nanowire (NW) structure has been proposed for JL-NW-Tunnel-Field Effect Transistor …
Impact of back gate bias on analog performance of do**less transistor
In this brief, the impact of back gate bias (V gb), on analog performance of silicon on
insulator do**less transistor (SOI-DLT) is investigated. It is observed that SOI-DLTs are …
insulator do**less transistor (SOI-DLT) is investigated. It is observed that SOI-DLTs are …
Aging mechanism of p-type do**less JLFET: NBTI and channel-hot-carrier stress
In this work, an extensive study of the aging mechanisms of the p-type do**less JLFET
(DL JLFET) structure is reported for the first time. The negative-bias-temperature-instability …
(DL JLFET) structure is reported for the first time. The negative-bias-temperature-instability …
Channel-hot-carrier degradation in the channel of junctionless transistors: a device-and circuit-level perspective
The performance and reliability enhancement achieved in a conventional double-gate (DG)
junctionless field-effect transistor (JLFET) by introducing a vacuum gate dielectric towards …
junctionless field-effect transistor (JLFET) by introducing a vacuum gate dielectric towards …
Investigation of silicon aging effects in do**less PUF for reliable security solution
Do**less (DLFET) provides better reliability against any physically doped devices. Hence,
this paper aims to provide a fair comparison between conventional junctionless (JLFET) and …
this paper aims to provide a fair comparison between conventional junctionless (JLFET) and …
Random dopant fluctuations and statistical variability in n-channel junctionless FETs
The influence of random dopant fluctuations on the statistical variability of the electrical
characteristics of n-channel silicon junctionless nanowire transistor (JNT) has been studied …
characteristics of n-channel silicon junctionless nanowire transistor (JNT) has been studied …
Easier said than done: An empirical investigation of software design and quality in open source software development
CA Conley, L Sproull - 2009 42nd Hawaii International …, 2009 - ieeexplore.ieee.org
We empirically examine the relationship between software design modularity and software
quality in open source software (OSS) development projects. Conventional wisdom …
quality in open source software (OSS) development projects. Conventional wisdom …