Some problems in a new chip design or its embedded software show up only when a silicon
prototype of the chip is placed in its intended target environment and the embedded …

In this book we present a number of techniques leading to the automated generation of
checker circuits from modern hardware assertion languages. Today, verification takes over …

This paper describes a system, the Running Time Advisor (or RTA), that can predict, at run-
time, the running time of a compute-bound task on a shared host running a variant of the …

It is increasingly difficult to guarantee the first silicon success for complex integrated circuit
(IC) designs. Post-silicon validation has thus become an essential step in the IC design flow …

Pre-silicon verification has been traditionally used for eliminating design bugs before tape-
out. However, due to the increasing design complexity and the limited accuracy in circuit …

Guillaume Marceau et al.,“The design design and implementation of a dataflow language for
Scriptable debugging. Online. Dec. 2006, pp. 59-86, Retrived from internet on Mar. 27 …

Assertions are now widely used in verification as a means to help convey designer intent (as
specification snippets) and also to simplify the detection of erroneous conditions by the firing …

Modern assertion languages, such as PSL and SVA, include many constructs that are best
handled by rewriting to a small set of base cases. Since previous rewrite attempts have …

When generating the verification stimuli in a pre-silicon environment, the primary objectives
are to reduce the simulation time and the pattern count for achieving the target coverage …

Assertions in silicon help post-silicon debug by providing observability of internal properties
within a system which are otherwise hard to observe. Besides generating synthesizable …