Fog/edge computing-based IoT (FECIoT): Architecture, applications, and research issues
The Internet-of-Things (IoT) is the future of the Internet, where everything will be connected.
Studies have revealed that fog/edge computing-based services will play a major role in …
Studies have revealed that fog/edge computing-based services will play a major role in …
The survey on ARM processors for HPC
The ongoing effort to reach the exascale computing barrier has led to a myriad of research
and publications in the topic of alternative energy-efficient architectures, such as ARM, for …
and publications in the topic of alternative energy-efficient architectures, such as ARM, for …
Fast behavioural rtl simulation of 10b transistor soc designs with metro-mpi
Chips with tens of billions of transistors have become today's norm. These designs are
straining our electronic design automation tools throughout the design process, requiring …
straining our electronic design automation tools throughout the design process, requiring …
Boosting performance optimization with interactive data movement visualization
Optimizing application performance in today's hardware architecture landscape is an
important, but increasingly complex task, often requiring detailed performance analyses. In …
important, but increasingly complex task, often requiring detailed performance analyses. In …
ARM HPC Ecosystem and the Reemergence of Vectors
ARM's involvement in funded international projects has helped pave the road towards ARM-
based supercomputers. ARM and its partners have collaborately grown an HPC ecosystem …
based supercomputers. ARM and its partners have collaborately grown an HPC ecosystem …
At the locus of performance: Quantifying the effects of copious 3D-stacked cache on HPC workloads
Over the last three decades, innovations in the memory subsystem were primarily targeted at
overcoming the data movement bottleneck. In this paper, we focus on a specific market trend …
overcoming the data movement bottleneck. In this paper, we focus on a specific market trend …
Gem5+ rtl: A framework to enable rtl models inside a full-system simulator
In recent years there has been a surge of interest in designing custom accelerators for
power-efficient high-performance computing. However, available tools to simulate low-level …
power-efficient high-performance computing. However, available tools to simulate low-level …
Multilevel simulation-based co-design of next generation HPC microprocessors
This paper demonstrates the combined use of three simulation tools in support of a co-
design methodology for an HPC-focused System-on-a-Chip (SoC) design. The simulation …
design methodology for an HPC-focused System-on-a-Chip (SoC) design. The simulation …
Accurate and Scalable Many-Node Simulation
Accurate performance estimation of future many-node machines is challenging because it
requires detailed simulation models of both node and network. However, simulating the full …
requires detailed simulation models of both node and network. However, simulating the full …
[PDF][PDF] At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads
Over the last three decades, innovations in the memory subsystem were primarily targeted at
overcoming the data movement bottleneck. In this paper, we focus on a specific market trend …
overcoming the data movement bottleneck. In this paper, we focus on a specific market trend …