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Method and apparatus for deadlock-free routing around an unusable routing component in an N-dimensional network
PR Pierce, LC Ernst, DS Dunning - US Patent 5,898,826, 1999 - Google Patents
54 METHOD AND APPARATUS FOR RV Bopanna, et al.,“New Wormhole Routing
Algorithms DEADLOCK-FREE ROUTING AROUND AN for Multicomputers”, International …
Algorithms DEADLOCK-FREE ROUTING AROUND AN for Multicomputers”, International …
Method of generating application specific integrated circuits using a programmable hardware architecture
C Ussery, O Levia, R Ryan - US Patent 6,075,935, 2000 - Google Patents
Custom integrated circuits are widely used today in the electronics industry. The demand for
custom integrated circuits is rapidly increasing because of a dramatic growth in the demand …
custom integrated circuits is rapidly increasing because of a dramatic growth in the demand …
Data processing system having multiple processors, a task scheduler for a data processing system having multiple processors and a corresponding method for task …
M Rutten, JT Van Eijndhoven, EJ Pol - US Patent App. 10/498,298, 2005 - Google Patents
The invention is based on the idea to provide distributed task Scheduling in a data
processing System having multiple processors. Therefore, a data processing System …
processing System having multiple processors. Therefore, a data processing System …
Fault tolerant self-optimizing multi-processor system and method thereof
JY Shi - US Patent App. 12/168,214, 2009 - Google Patents
BACKGROUND 0003. The awe-inspiring speed of high performance com puter systems has
fostered high hopes for high-end mission critical applications. These hopes have also …
fostered high hopes for high-end mission critical applications. These hopes have also …
Execution unit for processing a data stream independently and in parallel
H Park, RS Wong, T Nguyen, HY Edward - US Patent 6,401,194, 2002 - Google Patents
In accordance With an aspect of the invention, a processor provides a data path Wherein the
input data stream is divided into smaller data “slices”. Processing occurs on each data slice …
input data stream is divided into smaller data “slices”. Processing occurs on each data slice …
Modular packaging configuration and system and method of use for a computer system adapted for operating multiple operating systems in different partitions
MR Treiber, PP Klein, NK Newman… - US Patent 6,324,062, 2001 - Google Patents
In order to provide a packaging configuration that is well adapted to house a partitionable
computer System, a modular configuration has been discovered. According to one aspect of …
computer System, a modular configuration has been discovered. According to one aspect of …
Execution environment for data transformation applications
LL Schumacher, A Gonzales-Tuchmann… - US Patent …, 2013 - Google Patents
The execution environment provides for scalability Where components Will execute in
parallel and exploit various pat terns of parallelism. Data? oW applications are represented …
parallel and exploit various pat terns of parallelism. Data? oW applications are represented …
High speed serial communications link for desktop computer peripherals
DD Lee, D McAuley, N Wilhelm, JD Northcutt - US Patent 5,991,831, 1999 - Google Patents
The system of this invention, which is sometimes referred to herein as DeskNetTM,
addresses the full range of user class I/O devices. These range from near-zero bandwidth …
addresses the full range of user class I/O devices. These range from near-zero bandwidth …
Compiler method for employing multiple autonomous synergistic processors to simultaneously operate on longer vectors of data
JKP O'brien, KM O'brien, DA Prener - US Patent 7,962,906, 2011 - Google Patents
The illustrative embodiments described herein provide a computer implemented method,
apparatus, and computer usable program code for employing multiple SIMD accelera tors to …
apparatus, and computer usable program code for employing multiple SIMD accelera tors to …
Parallel data processing system with communication apparatus control
A Gunzinger - US Patent 5,671,430, 1997 - Google Patents
57 ABSTRACT A method for interconnecting and operating in parallel a number of
autonomous data processors each having a data memory, an instruction memory and a …
autonomous data processors each having a data memory, an instruction memory and a …