Recent Advances in Ultra-High-Speed Wireline Receivers With ADC-DSP-Based Equalizers

S Jang, J Lee, Y Choi, D Kim… - IEEE Open Journal of the …, 2024‏ - ieeexplore.ieee.org
High-speed wireline data transceivers (TRX) with analog-to-digital converter (ADC) followed
by digital signal processor (DSP) on the receiver (RX) equalizer became popular for …

Far-end crosstalk cancellation with MIMO OFDM for> 200 Gb/s ADC-based serial links

G Kim - IEEE Transactions on Circuits and Systems II: Express …, 2022‏ - ieeexplore.ieee.org
This brief presents an area-and power-efficient far-end crosstalk (FEXT) cancellation
scheme with multi-input multi-output (MIMO) orthogonal frequency-division multiplexing …

A low jitter 50 Gb/s PAM4 optical receiver in 130 nm SiGe BiCMOS

S Lu, S ** Ratio Optimization For ADC-Based High-Speed Serial Links
S Jang, J Lee, Y Choi, D Kim… - 2024 21st International …, 2024‏ - ieeexplore.ieee.org
In this paper, we investigated the relationship between clip** ratio and bit-error rate (BER)
for a discrete multitone (DMT) wireline transceiver. The peak-to-average-power ratio (PAPR) …

Link bit-error-rate requirement analysis for deep neural network accelerators

J Lee, G Kim, J Park, HM Bae - 2021 IEEE International …, 2021‏ - ieeexplore.ieee.org
In convolutional neural network (CNN) accelerators, the dominant power consumption is
caused by the access of external data memory. In addition, power and area occupied by I/O …