The heterogeneous accelerated processing units (APUs) integrate a multi-core CPU and a
GPU within the same chip. Modern APUs implement CPU–GPU platform atomics for simple …

We present Lerna, an end-to-end tool that automatically and transparently detects and
extracts parallelism from data-dependent sequential loops. Lerna uses speculation …

Transactional Memory (TM) has recently emerged as an optimistic concurrency control
technique that isolates concurrent executions at the level of memory reads and writes …

As a recently consolidated paradigm for optimistic concurrency in modern multicore
architectures, Transactional Memory (TM) can help to the exploitation of parallelism in …

Open nesting allows replacing the automatic detection of conflicting memory accesses used
in transactional memory (TM) with programmer-specified higher-level conflict detection …

The exploitation of optimistic concurrency in modern multicore architectures via
Transactional Memory (TM) is becoming a mainstream programming paradigm. TM features …

In this paper, we present Lerna, a system that automatically and transparently detects and
extracts parallelism from sequential code using speculation combined with a set of …

Destructible updates on shared objects require careful handling of concurrent accesses in
multi-threaded programs. Paradigms such as Transactional Memory support the …

The advent of heterogeneous many-core systems has increased the spectrum of achievable
performance from multi-threaded programming. As the processor components become more …

The exploitation of optimistic concurrency in modern multicore architectures via
Transactional Memory (TM) is becoming a mainstream programming paradigm. TM features …