The invention relates to a multi-core processor system, in particular a single-package multi-
core processor system, comprising at least two processor cores, preferably at least four …

2005-08-05 Assigned to PACT XPP TECHNOLOGIES AG reassignment PACT XPP
TECHNOLOGIES AG ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …

In one embodiment of the present invention a driver configures a graphics pipeline
implemented in a cache tiling architecture to perform dynamically-defined multi-pass …

Pike et al., Interpreting the data: Parallel analysis with Sawzall. Scientific Programming, 13
(4): 277-298, 2005. Pig. http://hadoop. apache. org/pig as of Jun. 2, 2009, retrieved from the …

(57) ABSTRACT A data processing device comprising a multidimensional array of coarse
grained logic elements processing data and operating at a? rst clock rate and …

An untrusted application is received at a data center including one or more processing
modules and providing a native pro cessing environment. The untrusted application …

US9495223B2 - Method and system for converting a single-threaded software program into an
application-specific supercomputer - Google Patents US9495223B2 - Method and system for …

In a data-processing method, first result data may be obtained using a plurality of
configurable coarse-granular elements, the first result data may be written into a memory …

This invention describes a compilation method of extracting and implementing an
accelerator control program from an application source code in a processor based system …

3,753,008 3,754,211 3,855,577 3,956,589 4,151,611 4,233,667 4.414, 547 4,498,134
4,498,172 4,566,102 4,571,736 4,590,583 4,591,979 4,594,682 4,623,997 4,646,300 …