Multiple Input Switching (MIS) effects commonly induce undesired glitch pulses at the output
of CMOS gates, potentially leading to circuit malfunction and significant power consumption …

Numerous million-transistor systems running with multiple asynchronous clocks at frequency
as high as multiple gigahertz have been made possible by diminishing component …

Background: In digital circuit design, assuring the safety and reliability of logic circuits is
critical. Unexpected behaviors or performance abnormalities represent possible hazards to …

In this paper, an attempt has been made to propose a methodology for detecting glitch on
clock tree, reset trees, and clock domain crossing (CDC) paths. These glitches, if not verified …

The emerging growth of digital systems depends on the errorless implementation of signal
processing circuits. These circuits are implemented in VLSI platforms that provide …

The problem of gate sizing to meet timing specification while minimizing functional
power/area is well understood and is solved by the use of geometric programs (GPs). While …

Dynamic power consumption is a significant concern in modern integrated circuits. This
issue is primarily caused by signal toggling, including unwanted toggles known as glitches …

Low power consumption constraints are often given comparable weight as other design flow
metrics (eg, high-speed computation performance, small silicon area, and short time-to …

Some IT project managers working for US military organizations are struggling to implement
modern modeling and simulation (M&S) technology. Implementation strategies are needed …

Hardware security has become a growing concern in the design and test of chips since its
manufacturing processes are becoming increasingly vulnerable due to malicious activities …