Concurrent multiband low-noise amplifiers-theory, design, and applications
The concept of concurrent multiband low-noise-amplifiers (LNAs) is introduced. A systematic
way to design concurrent multiband integrated LNAs in general is developed. Applications …
way to design concurrent multiband integrated LNAs in general is developed. Applications …
A capacitor cross-coupled common-gate low-noise amplifier
W Zhuo, X Li, S Shekhar, SHK Embabi… - … on Circuits and …, 2005 - ieeexplore.ieee.org
The conventional common-gate low-noise amplifier (CGLNA) exhibits a relatively high noise
figure (NF) at low operating frequencies relative to the MOSFET f/sub T/, which has limited its …
figure (NF) at low operating frequencies relative to the MOSFET f/sub T/, which has limited its …
A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS
DJ Cassan, JR Long - IEEE Journal of Solid-State Circuits, 2003 - ieeexplore.ieee.org
A low-noise amplifier (LNA) uses low-loss monolithic transformer feedback to neutralize the
gate-drain overlap capacitance of a field-effect transistor (FET). A differential implementation …
gate-drain overlap capacitance of a field-effect transistor (FET). A differential implementation …
A noise optimization technique for integrated low-noise amplifiers
JS Goo, HT Ahn, DJ Ladwig, Z Yu… - IEEE Journal of Solid …, 2002 - ieeexplore.ieee.org
Based on measured four-noise parameters and two-port noise theory, considerations for
noise optimization of integrated low-noise amplifier (LNA) designs are presented. If arbitrary …
noise optimization of integrated low-noise amplifier (LNA) designs are presented. If arbitrary …
RF-SoC-expectations and required conditions
A Matsuzawa - IEEE Transactions on Microwave Theory and …, 2002 - ieeexplore.ieee.org
This paper discusses the expectations for the development of radio-frequency systems-on-
chip (RF-SoCs) that integrate RF, analog, and digital circuits, and the conditions under …
chip (RF-SoCs) that integrate RF, analog, and digital circuits, and the conditions under …
A mixed-signal design roadmap
R Brederlow, W Weber, J Sauerer… - IEEE Design & Test …, 2001 - ieeexplore.ieee.org
The article presents a roadmap for the 2001 International Technology Roadmap for
Semiconductors. It uses performance figures of merit (FoMs) derived from basic circuits …
Semiconductors. It uses performance figures of merit (FoMs) derived from basic circuits …
A 0.8-db nf esd-protected 9-mw cmos lna operating at 1.23 ghz [for gps receiver]
In recent years, much research has been carried out on the possibility of using pure CMOS,
rather than bipolar or BiCMOS technologies, for radio-frequency (RF) applications. An …
rather than bipolar or BiCMOS technologies, for radio-frequency (RF) applications. An …
Low-voltage low-power CMOS-RF transceiver design
Research over the last ten years has resulted in attempts toward single-chip CMOS RF
circuits for Bluetooth, global positioning system, digital enhanced cordless …
circuits for Bluetooth, global positioning system, digital enhanced cordless …
Analysis and design of distributed ESD protection circuits for high-speed mixed-signal and RF ICs
C Ito, K Banerjee, RW Dutton - IEEE Transactions on Electron …, 2002 - ieeexplore.ieee.org
Electrostatic discharge (ESD) protection devices can have an adverse effect on the
performance of high-speed mixed-signal and RF circuits. This paper presents quantitative …
performance of high-speed mixed-signal and RF circuits. This paper presents quantitative …
A 7-GHz 1.8-dB NF CMOS low-noise amplifier
R Fujimoto, K Kojima, S Otaka - IEEE journal of solid-state …, 2002 - ieeexplore.ieee.org
A 7-GHz low-noise amplifier (LNA) was designed and fabricated using 0.25-/spl mu/m
CMOS technology. A cascode configuration with a dual-gate MOSFET and shielded pads …
CMOS technology. A cascode configuration with a dual-gate MOSFET and shielded pads …