This paper presents our work toward an operating system that manages the resources of a
reconfigurable device in a multitasking manner. We propose an online scheduling system …

In this paper, we propose a novel graph based clustering approach with satisfactory
clustering performance and low computational cost. It consists of two main steps: tree fitting …

This article presents a critical literature review on the security aspects of field-programmable
gate array (FPGA) devices. FPGA devices present unique challenges to cybersecurity …

This work describes the implementation of digital reconfigurable systems (DRS) using
commercial FPGA devices. This paper has three main goals. The first one is to present the …

Summary form only given. The increasing logic density of current FPGAs (field
programmable gate arrays) enables the integration of whole systems on one programmable …

Wearable computers are embedded into the mobile environment of their users. A design
challenge for wearable systems is to combine the high performance required for tasks such …

Field Programmable Gate Arrays (FPGAs) are very popular in today's embedded systems
design, and Partial Runtime-Reconfigurable (PRTR) FPGAs allow HW tasks to be placed …

Hardware acceleration significantly increases the performance of embedded systems built
on programmable logic. allowing an fpga-based mlcroblaze processor to self-select the …

This paper presents a top-down designer-driven design flow for creating hardware that
exploits partial run-time reconfiguration. Computer-aided design (CAD) tools are presented …

Virtex II FPGAs are widely used in current designs because of their high density of logic cells
and the availability of embedded DSP specific blocks (Multipliers) and Dual port RAMs …