Intermittent-aware neural architecture search

HR Mendis, CK Kang, P Hsiu - ACM Transactions on Embedded …, 2021 - dl.acm.org
The increasing paradigm shift towards i ntermittent computing has made it possible to
intermittently execute d eep neural network (DNN) inference on edge devices powered by …

CODEBench: A neural architecture and hardware accelerator co-design framework

S Tuli, CH Li, R Sharma, NK Jha - ACM Transactions on Embedded …, 2023 - dl.acm.org
Recently, automated co-design of machine learning (ML) models and accelerator
architectures has attracted significant attention from both the industry and academia …

Unleashing network/accelerator co-exploration potential on fpgas: A deeper joint search

W Lou, L Gong, C Wang, J Qian… - … on Computer-Aided …, 2024 - ieeexplore.ieee.org
Recently, algorithm-hardware (HW) co-exploration for neural networks (NNs) has become
the key to obtaining high-quality solutions. However, previous efforts for field-programmable …

Rethinking co-design of neural architectures and hardware accelerators

Y Zhou, X Dong, B Akin, M Tan, D Peng, T Meng… - arxiv preprint arxiv …, 2021 - arxiv.org
Neural architectures and hardware accelerators have been two driving forces for the
progress in deep learning. Previous works typically attempt to optimize hardware given a …