Abstract The region-based Convolutional Neural Network (CNN) detectors such as Faster R-
CNN or R-FCN have already shown promising results for object detection by combining the …

An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and
availability of SoCs. Therefore embedded memories are commonly equipped with spare …

Self-engineering systems that are capable of repairing themselves in-situ without the need
for human decision (or intervention) could be used to achieve zero-maintenance. This …

Modern electronics depend on nanoscaled technologies that present new challenges in
terms of testing and diagnostics. Memories are particularly prone to defects since they …

Defect-oriented testing methods have come a long way from a mere interesting academic
exercise to a hard industrial reality. Many factors have contributed to its industrial …

Testing embedded memories in a chip can be very challenging due to their high-density
nature and manufactured using very deep submicron (VDSM) technologies. In this review …

Error correction code (ECC) and built-in self-repair (BISR) schemes have been wildly used
for improving the yield and reliability of memories. Many built-in redundancy-analysis (BIRA) …

IoT devices need reliable hardware at low cost. It is challenging to efficiently cope with both
hard and soft faults in embedded scratchpad memories. To address this problem, we …

Three-dimensional (3D) stacking using through silicon vias (TSVs) is a promising solution to
provide low-latency and high-bandwidth DRAM access from microprocessors. The large …

The models and methods for creating Infrastructure Intellectual Property (I-IP) service for the
functionalities System on Chip (SoC), which has a minimum set of the real time Built-In Self …