The paper describes the recent state of the art in hierarchical analog synthesis, with a strong
emphasis on associated techniques for computer-aided model generation and optimization …

The performance of high-speed wireline data links depend crucially on the quality and
precision of their clocking infrastructure. For future applications, such as microprocessor …

CMOS spiral inductors have found a broad range of applications in highspeed analog signal
processing and data communications. These applications include bandwidth enhancement …

Phase-locked loops (PLLs) are used to implement a variety of timing related functions, such
as frequency synthesis, clock and data recovery, and clock de-skewing. Any jitter or phase …

Techniques for fast and accurate simulation of fractional-N synthesizers at a detailed
behavioral level are presented. The techniques allow a uniform time step to be used for the …

Injection locking is a nonlinear dynamical phenomenon that is often exploited in electronic
and optical oscillator design. Behavioral modeling techniques for oscillators that predict this …

A time-domain, non-Monte Carlo method for computer simulation of electrical noise in
nonlinear dynamic circuits with arbitrary excitations and arbitrary large-signal waveforms is …

In the past decade, substrate noise has had a constant and significant impact on the design
of analog and mixed-signal integrated circuits. Only recently, with advances in chip …

To protect user privacy in the search engine context, most current approaches, such as
private information retrieval and privacy preserving data mining, require a server-side …

In this paper, the event-driven concept is applied to the third order Charge-Pump Phase-
Locked Loop (CP-PLL) and leads to the description of a behavioral model based on a set of …