A survey of spintronic architectures for processing-in-memory and neural networks

S Umesh, S Mittal - Journal of Systems Architecture, 2019 - Elsevier
The rising overheads of data-movement and limitations of general-purpose processing
architectures have led to a huge surge in the interest in “processing-in-memory”(PIM) …

Evaluating machine learningworkloads on memory-centric computing systems

J Gómez-Luna, Y Guo, S Brocard… - … Analysis of Systems …, 2023 - ieeexplore.ieee.org
Training machine learning (ML) algorithms is a computationally intensive process, which is
frequently memory-bound due to repeatedly accessing large training datasets. As a result …

DRAM bender: An extensible and versatile FPGA-based infrastructure to easily test state-of-the-art DRAM chips

A Olgun, H Hassan, AG Yağlıkçı… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
To understand and improve DRAM performance, reliability, security, and energy efficiency,
prior works study characteristics of commodity DRAM chips. Unfortunately, state-of-the-art …

MATSA: An MRAM-based Energy-Efficient Accelerator for Time Series Analysis

I Fernandez, C Giannoula, A Manglik, R Quislant… - IEEE …, 2024 - ieeexplore.ieee.org
Time Series Analysis (TSA) is a critical workload to extract valuable information from
collections of sequential data, eg, detecting anomalies in electrocardiograms. Subsequence …

Large scale integrated IGZO crossbar memristor array based artificial neural architecture for scalable in-memory computing

M Naqi, T Kim, Y Cho, P Pujar, J Park, S Kim - Materials Today Nano, 2024 - Elsevier
Neuromorphic systems based on memristor arrays have not only addressed the von
Neumann bottleneck issue but have also enabled the development of computing …

In-memory computing: characteristics, spintronics, and neural network applications insights

P Jangra, M Duhan - Multiscale and Multidisciplinary Modeling …, 2024 - Springer
In today's digital computing landscape, In-Memory Computing (IMC) has emerged as a
revolutionary approach to tackling critical energy efficiency and latency challenges …

An experimental evaluation of machine learning training on a real processing-in-memory system

J Gómez-Luna, Y Guo, S Brocard, J Legriel… - arxiv preprint arxiv …, 2022 - arxiv.org
Training machine learning (ML) algorithms is a computationally intensive process, which is
frequently memory-bound due to repeatedly accessing large training datasets. As a result …

Design of an area-efficient computing in memory platform based on STT-MRAM

C Wang, Z Wang, G Wang, Y Zhang… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
In the era of big data, the memory wall between the processor and the memory as well as
leakage current have become major bottlenecks of the traditional CMOS-based Von …

Machine learning training on a real processing-in-memory system

J Gómez-Luna, Y Guo, S Brocard… - 2022 IEEE Computer …, 2022 - ieeexplore.ieee.org
Machine learning (ML) algorithms [1]–[6] have become ubiquitous in many fields of science
and technology due to their ability to learn from and improve with experience with minimal …

FAT: An in-memory accelerator with fast addition for ternary weight neural networks

S Zhu, LHK Duong, H Chen, D Liu… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Convolutional neural networks (CNNs) demonstrate excellent performance in various
applications but have high computational complexity. Quantization is applied to reduce the …