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Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
SJ Kweskin - US Patent 11,114,332, 2021 - Google Patents
US11114332B2 - Semiconductor on insulator structure comprising a plasma nitride layer and
method of manufacture thereof - Google Patents US11114332B2 - Semiconductor on insulator …
method of manufacture thereof - Google Patents US11114332B2 - Semiconductor on insulator …
InP-based transistor fabrication
5,061,644 5,079,616 5,091,333 5,091,767 5,093,699 5,098,850 5,105,247 5,108,947
5,156,995 5,159,413 5,164.359 5,166,767 5,223,043 5,236,546 5,238,869 5,256,594 …
5,156,995 5,159,413 5,164.359 5,166,767 5,223,043 5,236,546 5,238,869 5,256,594 …
Integration of strained Ge into advanced CMOS technology
This invention describes an integration scheme for advanced CMOS technology which
incorporates a high mobility strained Ge buried channel structure, leading to PMOS device …
incorporates a high mobility strained Ge buried channel structure, leading to PMOS device …
Method of constructing a semiconductor device and structure
Z Or-Bach, DC Sekar, B Cronquist, I Beinglass… - US Patent …, 2012 - Google Patents
2011-12-06 Assigned to MONOLITHIC 3D INC. reassignment MONOLITHIC 3D INC.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …
Three-dimensional semiconductor structure and method of manufacturing the same
SY Lee - US Patent App. 12/731,087, 2010 - Google Patents
(57) ABSTRACT A semiconductor circuit structure includes a Support Sub strate which
carries an interconnect region and electronic circuitry. The semiconductor circuit structure …
carries an interconnect region and electronic circuitry. The semiconductor circuit structure …
Semiconductor circuit
SY Lee - US Patent 8,071,438, 2011 - Google Patents
(57) ABSTRACT A semiconductor memory device includes a Substrate and an interconnect
region carried by the Substrate. A donor layer is coupled to the interconnect region through …
region carried by the Substrate. A donor layer is coupled to the interconnect region through …
Semiconductor memory device
SY Lee - US Patent 7,867,822, 2011 - Google Patents
(57) ABSTRACT A method includes forming a Switching device which includes a vertical
channel spaced apart from a semiconduc tor Substrate, and forming a storage device which …
channel spaced apart from a semiconduc tor Substrate, and forming a storage device which …
Bonded semiconductor structure and method of fabricating the same
SY Lee - US Patent 7,799,675, 2010 - Google Patents
(57) ABSTRACT A method of forming a bonded semiconductor structure cir cuit includes
providing a Support Substrate which carries a first semiconductor circuit and providing a first …
providing a Support Substrate which carries a first semiconductor circuit and providing a first …
Information storage system which includes a bonded semiconductor structure
SY Lee - US Patent 8,471,263, 2013 - Google Patents
An information storage system includes a bonded semicon ductor structure having a
memory circuit region carried by an interconnect region. The memory circuit region includes …
memory circuit region carried by an interconnect region. The memory circuit region includes …
Three-dimensional integrated circuit structure
SY Lee - US Patent 8,367,524, 2013 - Google Patents
Related US Application Data now abandoned, and a continuation-in-part of applica tion No.
1 1/378,059, filed on Mar. 17, 2006, and a continuation-in-part of application No. 1 …
1 1/378,059, filed on Mar. 17, 2006, and a continuation-in-part of application No. 1 …