Directed test generation for hardware validation: A survey
The complexity of hardware designs has increased over the years due to the rapid
advancement of technology coupled with the need to support diverse and complex features …
advancement of technology coupled with the need to support diverse and complex features …
Challenges and trends in modern SoC design verification
Challenges and Trends in Modern SoC Design Verification Page 1 7 2168-2356/17 © 2017
IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC September/October …
IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC September/October …
Hardware-assisted malware detection and localization using explainable machine learning
Malicious software, popularly known as malware, is widely acknowledged as a serious
threat to modern computing systems. Software-based solutions, such as anti-virus software …
threat to modern computing systems. Software-based solutions, such as anti-virus software …
[PDF][PDF] The case for neurons: a no-go theorem for consciousness on a chip
We apply the methodology of no-go theorems as developed in physics to the question of
artificial consciousness. The result is a no-go theorem which shows that under a general …
artificial consciousness. The result is a no-go theorem which shows that under a general …
TaintFuzzer: SoC security verification using taint inference-enabled fuzzing
Modern System-on-Chip (SoC) designs containing sensitive information have become
targets of malicious attacks. Unfortunately, current verification practices still undermine the …
targets of malicious attacks. Unfortunately, current verification practices still undermine the …
Hardware-assisted malware detection using machine learning
Malicious software, popularly known as malware, is a serious threat to modern computing
systems. A comprehensive cybercrime study by Ponemon Institute highlights that malware is …
systems. A comprehensive cybercrime study by Ponemon Institute highlights that malware is …
Beyond structural test, the rising need for system-level test
HH Chen - 2018 International Symposium on VLSI Design …, 2018 - ieeexplore.ieee.org
The steady march of Moore's Law in semiconductors has enabled the creation of ever more
complex systems with electronics playing a central role. As a result, thorough testing of …
complex systems with electronics playing a central role. As a result, thorough testing of …
User-space emulation framework for domain-specific soc design
In this work, we propose a portable, Linux-based emulation framework to provide an
ecosystem for hardware-software co-design of Domain-specific SoCs (DSSoCs) and enable …
ecosystem for hardware-software co-design of Domain-specific SoCs (DSSoCs) and enable …
If consciousness is dynamically relevant, artificial intelligence isn't conscious
We demonstrate that if consciousness is relevant for the temporal evolution of a system's
states--that is, if it is dynamically relevant--then AI systems cannot be conscious. That is …
states--that is, if it is dynamically relevant--then AI systems cannot be conscious. That is …
Self-learning tuning for post-silicon validation
Increasing complexity of modern chips makes design validation more difficult. Existing
approaches are not able anymore to cope with the complexity of tasks such as robust …
approaches are not able anymore to cope with the complexity of tasks such as robust …