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The role of contact resistance in graphene field-effect devices
F Giubileo, A Di Bartolomeo - Progress in Surface Science, 2017 - Elsevier
The extremely high carrier mobility and the unique band structure, make graphene very
useful for field-effect transistor applications. According to several works, the primary …
useful for field-effect transistor applications. According to several works, the primary …
FinFETs: From devices to architectures
D Bhattacharya, NK Jha - Advances in Electronics, 2014 - Wiley Online Library
Since Moore's law driven scaling of planar MOSFETs faces formidable challenges in the
nanometer regime, FinFETs and Trigate FETs have emerged as their successors. Owing to …
nanometer regime, FinFETs and Trigate FETs have emerged as their successors. Owing to …
Flip** bits in memory without accessing them: An experimental study of DRAM disturbance errors
Memory isolation is a key property of a reliable and secure computing system--an access to
one memory address should not have unintended side effects on data stored in other …
one memory address should not have unintended side effects on data stored in other …
Benchmarking of beyond-CMOS exploratory devices for logic integrated circuits
DE Nikonov, IA Young - IEEE Journal on Exploratory Solid …, 2015 - ieeexplore.ieee.org
A new benchmarking of beyond-CMOS exploratory devices for logic integrated circuits is
presented. It includes new devices with ferroelectric, straintronic, and orbitronic …
presented. It includes new devices with ferroelectric, straintronic, and orbitronic …
Vertical, electrolyte-gated organic transistors show continuous operation in the MA cm−2 regime and artificial synaptic behaviour
J Lenz, F Del Giudice, FR Geisenhof, F Winterer… - Nature …, 2019 - nature.com
Until now, organic semiconductors have failed to achieve high performance in highly
integrated, sub-100 nm transistors. Consequently, single-crystalline materials such as single …
integrated, sub-100 nm transistors. Consequently, single-crystalline materials such as single …
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number
of parallel processors. Performance optimization for multi-core processors has been a …
of parallel processors. Performance optimization for multi-core processors has been a …
A 1280× 960 dynamic vision sensor with a 4.95-μm pixel pitch and motion artifact minimization
Y Suh, S Choi, M Ito, J Kim, Y Lee, J Seo… - … on circuits and …, 2020 - ieeexplore.ieee.org
This paper reports a 1280× 960 DVS. A 4.95-μm pixel pitch is achieved with in-pixel Cu-Cu
connection and the newly designed GIDL-suppression scheme. A sequential column …
connection and the newly designed GIDL-suppression scheme. A sequential column …
[ספר][B] Sub-threshold design for ultra low-power systems
A Wang, BH Calhoun, AP Chandrakasan - 2006 - Springer
Although energy dissipation has improved with each new technology node, because SoCs
are integrating tens of million devices on-chip, the energy expended per operation has …
are integrating tens of million devices on-chip, the energy expended per operation has …
Gate oxide reliability issues of SiC MOSFETs under short-circuit operation
Silicon-Carbide (SiC) MOSFETs, due to material properties, are designed with smaller
thickness in the gate oxide and a higher electric field compared to Si MOSFETs …
thickness in the gate oxide and a higher electric field compared to Si MOSFETs …
Physics of strain effects in semiconductors and metal-oxide-semiconductor field-effect transistors
Y Sun, SE Thompson, T Nishida - Journal of Applied Physics, 2007 - pubs.aip.org
A detailed theoretical picture is given for the physics of strain effects in bulk semiconductors
and surface Si, Ge, and III–V channel metal-oxide-semiconductor field-effect transistors. For …
and surface Si, Ge, and III–V channel metal-oxide-semiconductor field-effect transistors. For …