STT-MRAM sensing: a review

T Na, SH Kang, SO Jung - … on Circuits and Systems II: Express …, 2020 - ieeexplore.ieee.org
This brief presents a review of developments in spin-transfer-torque magnetoresistive
random access memory (STT-MRAM) sensing over the past 20 years from a circuit design …

Offset-canceling current-sampling sense amplifier for resistive nonvolatile memory in 65 nm CMOS

T Na, B Song, JP Kim, SH Kang… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
Resistive nonvolatile memory (NVM) is considered to be a leading candidate for next-
generation memory. However, maintaining a target sensing margin is a challenge with …

A self-timed voltage-mode sensing scheme with successive sensing and checking for STT-MRAM

Y Zhou, H Cai, L **e, M Han, M Liu, S Xu… - … on Circuits and …, 2020 - ieeexplore.ieee.org
In Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM), the most
commonly used timing scheme for conventional Voltage-mode Sense Amplifier (VSA) is the …

Polymorphic hybrid CMOS-MTJ logic gates for hardware security applications

R Kumar, D Divyanshu, D Khan, S Amara, Y Massoud - Electronics, 2023 - mdpi.com
Various hardware security concerns, such as hardware Trojans and IP piracy, have sparked
studies in the security field employing alternatives to CMOS chips. Spintronic devices are …

Fast and efficient offset compensation by noise-aware pre-charge and operation of DRAM bit line sense amplifier

TB Kim, HJ Kim, KW Kwon - … on Circuits and Systems II: Express …, 2022 - ieeexplore.ieee.org
This brief proposes fast and efficient offset compensation for a DRAM bit-line sense
amplifier. Precharging the sense amplifier under the same conditions as the initial offset …

Dynamic dual-reference sensing scheme for deep submicrometer STT-MRAM

W Kang, T Pang, W Lv, W Zhao - IEEE Transactions on Circuits …, 2016 - ieeexplore.ieee.org
As process technology downscales, read reliability has become a critical barrier for spin
transfer torque magnetic random access memory (STT-MRAM), owing to the increasing …

A double-sensing-margin offset-canceling dual-stage sensing circuit for resistive nonvolatile memory

T Na, J Kim, JP Kim, SH Kang… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Resistive nonvolatile memory (NVM) devices such as spin transfer torque random access
memory (STT-RAM) and resistive random access memory are considered to be leading …

Rethinking DRAM's page mode with STT-MRAM

B Oh, N Abeyratne, NS Kim, J Ahn… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
Spin torque magnetic random access memory (STT-MRAM) is a promising candidate for
drop-in replacement for DRAM-based main memory because of its higher energy efficiency …

A CFMB STT-MRAM-Based Computing-in-Memory Proposal With Cascade Computing Unit for Edge AI Devices

Y Zhou, Z Zhou, Y Wei, Z Yang, X Lin… - … on Circuits and …, 2023 - ieeexplore.ieee.org
The application of non-volatile memory technology is increasingly attractive for Computing-
in-memory (CIM) owing to high integration density and negligible standby power …