Omega: flexible, scalable schedulers for large compute clusters

M Schwarzkopf, A Konwinski, M Abd-El-Malek… - Proceedings of the 8th …, 2013 - dl.acm.org
Increasing scale and the need for rapid response to changing requirements are hard to meet
with current monolithic cluster scheduler architectures. This restricts the rate at which new …

Parallel programmability and the chapel language

BL Chamberlain, D Callahan… - … International Journal of …, 2007 - journals.sagepub.com
In this paper we consider productivity challenges for parallel programmers and explore ways
that parallel language design might help improve end-user productivity. We offer a …

STAMP: Stanford transactional applications for multi-processing

CC Minh, JW Chung, C Kozyrakis… - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
Transactional Memory (TM) is emerging as a promising technology to simplify parallel
programming. While several TM systems have been proposed in the research literature, we …

[BOK][B] Transactional memory

T Harris, JR Larus, R Rajwar - 2010 - api.taylorfrancis.com
Many of the challenges in building shared-memory data structures stem from needing to
update several memory locations at once—eg, updating four pointers to insert an item into a …

Transactional memory: An overview

T Harris, A Cristal, OS Unsal, E Ayguade… - IEEE micro, 2007 - ieeexplore.ieee.org
Writing applications that benefit from the massive computational power of future multicore
chip multiprocessors will not be an easy task for mainstream programmers accustomed to …

Hybrid transactional memory

P Damron, A Fedorova, Y Lev, V Luchangco… - Proceedings of the 12th …, 2006 - dl.acm.org
Transactional memory (TM) promises to substantially reduce the difficulty of writing correct,
efficient, and scalable concurrent programs. But" bounded" and" best-effort" hardware TM …

CoreDet: A compiler and runtime system for deterministic multithreaded execution

T Bergan, O Anderson, J Devietti, L Ceze… - Proceedings of the …, 2010 - dl.acm.org
The behavior of a multithreaded program does not depend only on its inputs. Scheduling,
memory reordering, timing, and low-level hardware effects all introduce nondeterminism in …

[BOK][B] Transactional memory

JR Larus, R Rajwar - 2022 - books.google.com
The advent of multicore processors has renewed interest in the idea of incorporating
transactions into the programming model used to write parallel programs. This approach …

An effective hybrid transactional memory system with strong isolation guarantees

CC Minh, M Trautmann, JW Chung… - Proceedings of the 34th …, 2007 - dl.acm.org
We propose signature-accelerated transactional memory (SigTM), ahybrid TM system that
reduces the overhead of software transactions. SigTM uses hardware signatures to track the …

Stretching transactional memory

A Dragojević, R Guerraoui, M Kapalka - ACM sigplan notices, 2009 - dl.acm.org
Transactional memory (TM) is an appealing abstraction for programming multi-core systems.
Potential target applications for TM, such as business software and video games, are likely …