HPVM2FPGA: Enabling true hardware-agnostic FPGA programming
Current FPGA programming tools require extensive hardware-specific manual code tuning
to achieve performance, which is intractable for most software application teams. We present …
to achieve performance, which is intractable for most software application teams. We present …
Baco: A fast and portable Bayesian compiler optimization framework
We introduce the Bayesian Compiler Optimization framework (BaCO), a general purpose
autotuner for modern compilers targeting CPUs, GPUs, and FPGAs. BaCO provides the …
autotuner for modern compilers targeting CPUs, GPUs, and FPGAs. BaCO provides the …
Scotch: Generating fpga-accelerators for sketching at line rate
Sketching algorithms are a powerful tool for single-pass data summarization. Their
numerous applications include approximate query processing, machine learning, and large …
numerous applications include approximate query processing, machine learning, and large …
ART-3D: Analytical 3D placement with reinforced parameter tuning for monolithic 3D ICs
In this paper, we show that true 3D placement approaches, enhanced with reinforcement
learning, can offer further PPA improvements over pseudo-3D approaches. To accomplish …
learning, can offer further PPA improvements over pseudo-3D approaches. To accomplish …
Can monitoring system state+ counting custom instruction sequences aid malware detection?
Signature and behavior-based anti-virus systems (AVS) are traditionally used to detect
Malware. However, these AVS fail to catch metamorphic and polymorphic Malware-which …
Malware. However, these AVS fail to catch metamorphic and polymorphic Malware-which …
Autotuning under tight budget constraints: A transparent design of experiments approach
A large amount of resources is spent writing, porting, and optimizing scientific and industrial
High Performance Computing applications, which makes autotuning techniques …
High Performance Computing applications, which makes autotuning techniques …
Memory-driven data-flow optimization for neural processing accelerators
Q Nie - 2020 - search.proquest.com
Neural processing applications are widely used in many fields like vision, speech
recognition and language processing to realize artificial intelligence, but they are very …
recognition and language processing to realize artificial intelligence, but they are very …
[PDF][PDF] Accelerating approximate data analysis with parallel processors
M Kiefer - 2023 - blog.boxm.de
Martin Kiefer Page 1 Accelerating Approximate Data Analysis with Parallel Processors 2.2.2023
Martin Kiefer PhD Defense Page 2 Approximate Data Analysis Trading accuracy for faster …
Martin Kiefer PhD Defense Page 2 Approximate Data Analysis Trading accuracy for faster …
Compiler techniques for enabling general-purpose hardware-agnostic FPGA programming
A Ejjeh - 2022 - ideals.illinois.edu
Recently, FPGAs have become widely available in heterogeneous systems and public
clouds, taking them beyond the traditional audience of hardware designers and making …
clouds, taking them beyond the traditional audience of hardware designers and making …
Using Reduced Graphs for Efficient HLS Scheduling
High-Level Synthesis (HLS) is the process of generating digital circuits from high-level
algorithmic descriptions. One of the major steps in this design approach is scheduling, which …
algorithmic descriptions. One of the major steps in this design approach is scheduling, which …