A review on online testability for reversible logic

HM Gaur, AK Singh, U Ghanekar - Procedia Computer Science, 2015 - Elsevier
Reversible logic is the key to enter into the new era of incredibly compact electronic devices
with ultra low power consumption. Testing of these devices is another significant issue. As a …

Offline testing of reversible logic circuits: an analysis

HM Gaur, AK Singh, U Ghanekar - Integration, 2018 - Elsevier
Reversible logic is one of the foregrounds to meet the ever-changing demands electronic
devices with its applications to quantum computation. The change in technology gives rise to …

Design of reversible circuits with high testability

HM Gaur, AK Singh - Electronics Letters, 2016 - Wiley Online Library
A new method of designing reversible logic circuits which can be adopted by any synthesis
technique to produce parity preserving reversible circuits based on Multiple Controlled …

An efficient design of scalable reversible multiplier with testability

HM Gaur, AK Singh, U Ghanekar - Journal of Circuits, Systems and …, 2022 - World Scientific
A new architecture of 4-bit reversible multiplier with scalability factor of order 4 N is
presented in this paper. The design procedure is based on a unique method of gates …

Reversible logic: An introduction

HM Gaur, TN Sasamal, AK Singh, A Mohan… - Design and Testing of …, 2020 - Springer
Reversible logic is one of the alternatives to meet the requirement of power, speed and size
in EDA (Electronic Design Automation) industry because these circuits are theoretically …

A new DFT methodology for k-CNOT reversible circuits and its implementation using quantum-dot cellular automata

HM Gaur, AK Singh, U Ghanekar - Optik, 2016 - Elsevier
Testable design of reversible circuits leads to a large increment in operating costs from their
original circuits. This paper presents a new cost efficient methodology of converting k-CNOT …

From reversible logic to quantum circuits: Logic design for an emerging technology

R Wille, A Chattopadhyay… - … conference on embedded …, 2016 - ieeexplore.ieee.org
Quantum computing has been attracting increasing attention in recent years because of the
rapid advancements that have been made in quantum algorithms and quantum system …

Design of single-bit fault-tolerant reversible circuits

HM Gaur, AK Singh, A Mohan, M Fujita… - IEEE Design & …, 2020 - ieeexplore.ieee.org
This article introduces redundant design approaches for reversible circuits that have the
ability to detect and tolerate single-bit fault without the need of conventional voting scheme …

Reversible circuits with testability using quantum controlled NOT and swap gates

HM Gaur, AK Singh, U Gaur - Indian Journal of Pure & Applied …, 2018 - op.niscpr.res.in
A new method of designing reversible circuits with inbuilt testability is presented by
exploiting the properties of quantum controlled NOT and Swap gates. The design process is …

Simplification and modification of multiple controlled Toffoli circuits for testability

HM Gaur, AK Singh, U Ghanekar - Journal of Computational Electronics, 2019 - Springer
Testability dramatically enhances the operating cost in reversible logic circuits as it
increases the cost metrics such as gate count, quantum cost, number of wires and garbage …