Most compilers have a single core intermediate representation (IR)(eg, LLVM) sometimes
complemented with vaguely defined IR-like data structures. This IR is commonly low-level …

Stencil computation is one of the most widely-used compute patterns in high performance
computing applications. Spatial and temporal blocking have been proposed to overcome the …

Abstract Graphics Processing Units (GPUs) can be used as convenient hardware
accelerators to speed up Cellular Automata (CA) simulations, which are employed in many …

The Tensor Core Unit (TCU) has been increasingly adopted on modern high performance
processors, specialized in boosting the performance of general matrix multiplication …

HPC is a heterogeneous world in which host and device code are interleaved throughout
the application. Given the significant performance advantage of accelerators, device code …

In this paper, we propose a μ-mode integrator for computing the solution of stiff evolution
equations. The integrator is based on a d-dimensional splitting approach and uses exact …

Stencil computations are often the compute-intensive kernel in many scientific applications.
With the increasing demand for computational accuracy, and the emergence of massively …

This paper proposes a versatile high-performance execution model, inspired by systolic
arrays, for memory-bound regular kernels running on CUDA-enabled GPUs. We formulate a …

Finite-difference methods based on high-order stencils are widely used in seismic
simulations, weather forecasting, and computational fluid dynamics. Recently, multiple …

While implementation strategies for low-order stencils on GPUs have been well-studied in
the literature, not all of the techniques work well for high-order stencils, such as those used …