A systematic evaluation of transient execution attacks and defenses

C Canella, J Van Bulck, M Schwarz, M Lipp… - 28th USENIX Security …, 2019 - usenix.org
Research on transient execution attacks including Spectre and Meltdown showed that
exception or branch misprediction events might leave secret-dependent traces in the CPU's …

A Survey on Thwarting Memory Corruption in RISC-V

M Brohet, F Regazzoni - ACM Computing Surveys, 2023 - dl.acm.org
With embedded devices becoming more pervasive and entrenched in society, it is
paramount to keep these systems secure. A threat plaguing these systems consists of …

A comprehensive survey of hardware-assisted security: From the edge to the cloud

L Coppolino, S D'Antonio, G Mazzeo, L Romano - Internet of Things, 2019 - Elsevier
Sensitive data processing occurs more and more on machines or devices out of users
control. In the Internet of Things world, for example, the security of data could be posed at …

{ERIM}: Secure, efficient in-process isolation with protection keys ({{{{{MPK}}}}})

A Vahldiek-Oberwagner, E Elnikety… - 28th USENIX Security …, 2019 - usenix.org
Isolating sensitive state and data can increase the security and robustness of many
applications. Examples include protecting cryptographic keys against exploits like …

SoK: Sanitizing for security

D Song, J Lettner, P Rajasekaran, Y Na… - … IEEE Symposium on …, 2019 - ieeexplore.ieee.org
The C and C++ programming languages are notoriously insecure yet remain indispensable.
Developers therefore resort to a multi-pronged approach to find security issues before …

{PAC} it up: Towards pointer integrity using {ARM} pointer authentication

H Liljestrand, T Nyman, K Wang, CC Perez… - 28th USENIX Security …, 2019 - usenix.org
Run-time attacks against programs written in memory-unsafe programming languages (eg,
C and C++) remain a prominent threat against computer systems. The prevalence of …

I see dead µops: Leaking secrets via intel/amd micro-op caches

X Ren, L Moody, M Taram, M Jordan… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
Modern Intel, AMD, and ARM processors translate complex instructions into simpler internal
micro-ops that are then cached in a dedicated on-chip structure called the micro-op cache …

Sledge: A serverless-first, light-weight wasm runtime for the edge

PK Gadepalli, S McBride, G Peach… - Proceedings of the 21st …, 2020 - dl.acm.org
Emerging IoT applications with real-time latency constraints require new data processing
systems operating at the Edge. Serverless computing offers a new compelling paradigm …

Intel mpx explained: A cross-layer analysis of the intel mpx system stack

O Oleksenko, D Kuvaiskii, P Bhatotia, P Felber… - Proceedings of the …, 2018 - dl.acm.org
Memory-safety violations are the primary cause of security and reliability issues in software
systems written in unsafe languages. Given the limited adoption of decades-long research in …

SGXBOUNDS: Memory safety for shielded execution

D Kuvaiskii, O Oleksenko, S Arnautov, B Trach… - Proceedings of the …, 2017 - dl.acm.org
Shielded execution based on Intel SGX provides strong security guarantees for legacy
applications running on untrusted platforms. However, memory safety attacks such as …