Hardware information flow tracking

W Hu, A Ardeshiricham, R Kastner - ACM Computing Surveys (CSUR), 2021 - dl.acm.org
Information flow tracking (IFT) is a fundamental computer security technique used to
understand how information moves through a computing system. Hardware IFT techniques …

Survey of microarchitectural side and covert channels, attacks, and defenses

J Szefer - Journal of Hardware and Systems Security, 2019 - Springer
Over the last two decades, side and covert channel research has shown a variety of ways of
exfiltrating information for a computer system. Processor microarchitectural timing-based …

A survey of microarchitectural timing attacks and countermeasures on contemporary hardware

Q Ge, Y Yarom, D Cock, G Heiser - Journal of Cryptographic Engineering, 2018 - Springer
Microarchitectural timing channels expose hidden hardware states though timing. We survey
recent attacks that exploit microarchitectural features in shared hardware, especially as they …

Speculative taint tracking (stt) a comprehensive protection for speculatively accessed data

J Yu, M Yan, A Khyzha, A Morrison, J Torrellas… - Proceedings of the …, 2019 - dl.acm.org
Speculative execution attacks present an enormous security threat, capable of reading
arbitrary program data under malicious speculation, and later exfiltrating that data over …

Ryoan: A distributed sandbox for untrusted computation on secret data

T Hunt, Z Zhu, Y Xu, S Peter, E Witchel - ACM Transactions on Computer …, 2018 - dl.acm.org
Users of modern data-processing services such as tax preparation or genomic screening
are forced to trust them with data that the users wish to keep secret. Ryoan1 protects secret …

A hardware design language for timing-sensitive information-flow security

D Zhang, Y Wang, GE Suh, AC Myers - Acm Sigplan Notices, 2015 - dl.acm.org
Information security can be compromised by leakage via low-level hardware features. One
recently prominent example is cache probing attacks, which rely on timing channels created …

Data oblivious ISA extensions for side channel-resistant and high performance computing

J Yu, L Hsiung, M El Hajj, CW Fletcher - Cryptology ePrint Archive, 2018 - eprint.iacr.org
Blocking microarchitectural (digital) side channels is one of the most pressing challenges in
hardware security today. Recently, there has been a surge of effort that attempts to block …

Opening pandora's box: A systematic study of new ways microarchitecture can leak private data

JRS Vicarte, P Shome, N Nayak… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
Microarchitectural attacks have plunged Computer Architecture into a security crisis. Yet, as
the slowing of Moore's law justifies the use of ever more exotic microarchitecture, it is likely …

Sapper: A language for hardware-level security policy enforcement

X Li, V Kashyap, JK Oberg, M Tiwari… - Proceedings of the 19th …, 2014 - dl.acm.org
Privacy and integrity are important security concerns. These concerns are addressed by
controlling information flow, ie, restricting how information can flow through a system. Most …

SurfNoC: A low latency and provably non-interfering approach to secure networks-on-chip

HMG Wassel, Y Gao, JK Oberg, T Huffmire… - ACM SIGARCH …, 2013 - dl.acm.org
As multicore processors find increasing adoption in domains such as aerospace and
medical devices where failures have the potential to be catastrophic, strong performance …