A steady trend towards the design of mostly-digital and digital-friendly analog circuits,
suitable to integration in mainstream nanoscale CMOS by a highly automated design flow …

In this paper a novel ultra-low voltage (ULV) standard-cell-based comparator which provides
rail-to-rail input common-mode range (ICMR) is presented. The topology, unlike the others in …

An ultra-low voltage, ultra-low power rail-to-rail dynamic voltage comparator solely based on
digital standard cells is presented. Thanks to its digital nature, the comparator can be …

This paper presents a fully synthesizable successive-approximation-register (SAR) analog-
to-digital converter (ADC) for on-chip distributed waveform monitoring in a low-power system …

This paper presents a novel implementation of a digital-based Operational
Transconductance Amplifier (OTA) which has been recently introduced in the technical …

In this paper, very compact, standard cell-based Digital-to-Analog converters (DACs) based
on the Dyadic Digital Pulse Modulation (DDPM) are presented. As fundamental contribution …

This paper reviews the results of recent researches aimed to extend the standard-cell based
digital design flow to analog building blocks, so that to enhance scalability, reconfigurability …

In this paper, a fully synthesizable digital-to-analog converter (DAC) is proposed. Based on
a digital standard cell approach, the proposed DAC allows very low design effort and …

The calibration of the effects of process variations and device mismatch in Ultra Low Voltage
(ULV) Digital-Based Operational Transconductance Amplifiers (DB-OTAs) is addressed in …

In this paper, the implementation on a Field Programmable Gate Array (FPGA) of Relaxation
Digital to Analog Converters (ReDACs), which take advantage of the impulse response of a …