Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large
increase in the size of on-chip caches. Since SRAM has low density and consumes large …

Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest
due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent …

For the sake of higher cell density while achieving near-zero standby power, recent research
progress in Magnetic Tunneling Junction (MTJ) devices has leveraged Multi-Level Cell …

Much research has shown that applications have variable runtime cache requirements. In
the context of the increasingly popular spin-transfer torque RAM (STT-RAM) cache, the …

Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to
SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high …

Management of a problem recently known as “dark silicon” is a new challenge in multicore
designs. Prior innovative studies have addressed the dark silicon problem in the fields of …

Multi-level Cell (MLC) Phase Change Memory (PCM) has many attractive features to be
used as main memory for embedded systems. These features include low power, high …

In recent years, the increased working set size of applications craves more memory demand
in terms of large-sized last-level caches (LLCs). To fulfill this, one of the promising …

On-chip power consumption is one of the fundamental challenges of current technology
scaling. Cache memories consume a sizable part of this power, particularly due to leakage …

STT-RAMs have been studied as a promising alternative to SRAMs in embedded systems'
caches and main memories. STT-RAMs are attractive due to their low leakage power and …