Writing applications that benefit from the massive computational power of future multicore
chip multiprocessors will not be an easy task for mainstream programmers accustomed to …

A data processing system includes one or more nodes, each node including a memory sub-
system. The sub-system includes a fine-grained, memory, and a less-fine-grained (eg, page …

Transactional memory (TM) promises to substantially reduce the difficulty of writing correct,
efficient, and scalable concurrent programs. But" bounded" and" best-effort" hardware TM …

The advent of multicore processors has renewed interest in the idea of incorporating
transactions into the programming model used to write parallel programs. This approach …

We present the introduction of transactional memory into the next generation IBM System z
CPU. We first describe the instruction-set architecture features, including requirements for …

We propose signature-accelerated transactional memory (SigTM), ahybrid TM system that
reduces the overhead of software transactions. SigTM uses hardware signatures to track the …

Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL
TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL …

Hardware Transactional Memory (HTM) systems reflect choices from three key design
dimensions: conflict detection, version management, and conflict resolution. Previously …

Transactional memory systems are expected to enable parallel programming at lower
programming complexity, while delivering improved performance over traditional lock-based …

Nested transactional memory (TM) facilitates software composition by letting one module
invoke another without either knowing whether the other uses transactions. Closed nested …