The power consumption of integrated circuits is one of the most problematic considerations
affecting the design of high-performance chips and portable devices. The study of power …

Embedded systems now include a very large proportion of the advanced products designed
in the world, spanning transport (avionics, space, automotive, trains), electrical and …

Very small instruction caches have been shown to greatly reduce fetch energy. However, for
many applications the use of a small filter cache can lead to an unacceptable increase in …

Instruction memory organisations have been pointed out as one of the major sources of
energy consumption in embedded systems. As embedded systems are characterised by …

Main memories can consume a significant portion of overall energy in many data-intensive
embedded applications. One way of reducing this energy consumption is banking, that is …

Conventional cache tag matching identifies the requested data based on a memory address.
However, this address-based tag matching is inefficient because it requires unnecessarily …

Conventional cache tag matching is based on addresses to identify correct data in caches.
However, this tagging scheme is not efficient because tag bits are unnecessarily large. From …

Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy.
Current research focuses on finding good tradeoffs between hardware cost and percentage …

This paper proposes a low-energy instruction-cache architecture, called history-based tag-
comparison (HBTC) cache. The HBTC cache attempts to re-use tag-comparison results for …

This chapter describes architectural techniques appropriate for reducing power and energy
in caches. It also describes conventional cache design, and considers the sources of energy …