Optics in computing: From photonic network-on-chip to chip-to-chip interconnects and disintegrated architectures

T Alexoudi, N Terzenidis, S Pitris… - Journal of Lightwave …, 2018 - ieeexplore.ieee.org
Following a decade of radical advances in the areas of integrated photonics and computing
architectures, we discuss the use of optics in the current computing landscape attempting to …

Designing far memory data structures: Think outside the box

MK Aguilera, K Keeton, S Novakovic… - Proceedings of the …, 2019 - dl.acm.org
Technologies like RDMA and Gen-Z, which give access to memory outside the box, are
gaining in popularity. These technologies provide the abstraction of far memory, where …

Spandex: A flexible interface for efficient heterogeneous coherence

J Alsop, M Sinclair, S Adve - 2018 ACM/IEEE 45th Annual …, 2018 - ieeexplore.ieee.org
Recent heterogeneous architectures have trended toward tighter integration and shared
memory largely due to the efficient communication and programmability enabled by this …

Exploiting commutativity to reduce the cost of updates to shared data in cache-coherent systems

G Zhang, W Horn, D Sanchez - … of the 48th International Symposium on …, 2015 - dl.acm.org
We present Coup, a technique to lower the cost of updates to shared data in cache-coherent
systems. Coup exploits the insight that many update operations, such as additions and …

Revisiting the complexity of hardware cache coherence and some implications

R Komuravelli, SV Adve, CT Chou - ACM Transactions on Architecture …, 2014 - dl.acm.org
Cache coherence is an integral part of shared-memory systems but is also widely
considered to be one of the most complex parts of such systems. Much prior work has …

Accelerating cache coherence in manycore processor through silicon photonic chiplet

C Li, F Jiang, S Chen, J Zhang, Y Liu, Y Fu… - Proceedings of the 41st …, 2022 - dl.acm.org
Cache coherence overhead in manycore systems is becoming prominent with the increase
of system scale. However, traditional electrical networks restrict the efficiency of cache …

The effects of granularity and adaptivity on private/shared classification for coherence

M Davari, A Ros, E Hagersten, S Kaxiras - ACM Transactions on …, 2015 - dl.acm.org
Classification of data into private and shared has proven to be a catalyst for techniques to
reduce coherence cost, since private data can be taken out of coherence and resources can …

Leveraging Cache Coherence to Detect and Repair False Sharing On-the-fly

V Patel, S Biswas, M Chaudhuri - 2024 57th IEEE/ACM …, 2024 - ieeexplore.ieee.org
Performance bugs due to false sharing do not man-ifest as observable correctness errors,
and hence are challenging to detect and repair. Prior approaches aim to both detect and …

Data placement across the cache hierarchy: Minimizing data movement with reuse-aware placement

A Sembrant, E Hagersten… - 2016 IEEE 34th …, 2016 - ieeexplore.ieee.org
Modern processors employ multiple levels of caching to address bandwidth, latency and
performance requirements. The behavior of these hierarchies is determined by their …

Comparison of significant issues in multicore cache coherence

AD Joshi, N Ramasubramanian - … international conference on …, 2015 - ieeexplore.ieee.org
Multicore processors are becoming dominant in todays computing environment. All
multicore processors are with cache coherent memory model. Users can have multiple …