Investigation of endurance degradation for 3-D charge trap NAND flash memory with bandgap-engineered tunneling oxide
In 3-D charge trap (CT) NAND flash memory, program/erase (P/E) cycling tests are
performed, and the degradation of cell characteristics is investigated. The mechanism of mid …
performed, and the degradation of cell characteristics is investigated. The mechanism of mid …
A hot hole-programmed and low-temperature-formed SONOS flash memory
YM Chang, WL Yang, SH Liu, YP Hsiao, JY Wu… - Nanoscale research …, 2013 - Springer
In this study, a high-performance Ti x Zr y Si z O flash memory is demonstrated using a sol–
gel spin-coating method and formed under a low annealing temperature. The high-efficiency …
gel spin-coating method and formed under a low annealing temperature. The high-efficiency …
Damage and optimization of program/erase operation in MANOS 3D NAND flash memory
Y Fan, Z Wang, S Yang, C Du, K Han, Y He - Microelectronic Engineering, 2023 - Elsevier
In this work, the damage caused by program/erase (P/E) operation in 3D NAND memory
devices made of Metal-Al 2 O 3-Nitride-Oxide-Semiconductor (MANOS) was examined. The …
devices made of Metal-Al 2 O 3-Nitride-Oxide-Semiconductor (MANOS) was examined. The …
On the voltage scaling potential of SONOS non-volatile memory transistors
With technology scaling of embedded nonvolatile memories, voltage scaling below 12 V is a
primary goal to maintain the area efficiency of the memory module. The SONOS technology …
primary goal to maintain the area efficiency of the memory module. The SONOS technology …
Comparison between N2 and O2 anneals on the integrity of an Al2O3/Si3N4/SiO2/Si memory gate stack
YQ Chu, MH Zhang, ZL Huo, M Liu - Chinese Physics B, 2014 - iopscience.iop.org
In this paper the endurance characteristics and trap generation are investigated to study the
effects of different post-deposition anneals (PDAs) on the integrity of an Al 2 O 3/Si 3 N 4/SiO …
effects of different post-deposition anneals (PDAs) on the integrity of an Al 2 O 3/Si 3 N 4/SiO …
Electrical degradation mechanisms of nanoscale charge trap flash memories due to trapped charge in the oxide layer
The deterioration of the electrical characteristics of charge trap flash (CTF) memories with a
silicon-oxide-nitride-oxide-silicon (SONOS) structure due to the charge traps in the oxide …
silicon-oxide-nitride-oxide-silicon (SONOS) structure due to the charge traps in the oxide …
Vertical stack array of one-time programmable nonvolatile memory based on pn-junction diode and its operation scheme for faster access
In this work, a three-dimensional (3-D) architecture of one-time programmable (OTP)
nonvolatile memory (NVM) arrays is introduced and its viable process integration and …
nonvolatile memory (NVM) arrays is introduced and its viable process integration and …