Simulation study on ferroelectric layer thickness dependence RF/Analog and linearity parameters in ferroelectric tunnel junction TFET

R Saha - Microelectronics Journal, 2021 - Elsevier
In this paper, the impact of ferroelectric layer thickness (t FE) on input drain current
characteristic is reported in ferroelectric tunnel junction (FTJ) TFET through TCAD simulator …

Design and analysis of ferro electric-tunneling junction-VTFET for RF/analog and linear application

S Singh - Silicon, 2022 - Springer
In this paper a new ferro material embedded structure is introduced between the tunneling
junction to gain and improve ON/OFF current ratio with steeper subthreshold slope. Various …

Design and simulation-based analysis of triple metal gate with ferroelectric-SiGe heterojunction based vertical TFET for Performance Enhancement

S Singh, R Gupta, Priyanka, R Singh, SK Bhalla - Silicon, 2022 - Springer
In this work, a triple metal gate-ferroelectric material-with SiGe heterojunction based vertical
structure of Tunnel field effect transistor (TMG-FE-SiGe-VTFET) is proposed and …

Comparative investigation of low-power ferroelectric material embedded with different heterojunction vertical TFET structures

S Singh - Journal of Materials Science: Materials in Electronics, 2022 - Springer
This paper basically proposes and compares three different configurations of ferroelectric
oxide material on silicon body of vertical tunnel field-effect transistor. The charge plasma …

Comparative analysis of Change plasma and Junctionless Ferroelectric tunneling junction of VTFET for improved performance

S Singh - Silicon, 2023 - Springer
The effect of ferroelectric material at tunneling junction is compared for the two different
configuration of Charge plasma and Junctionless of Vertical TFET structure. Various …

Design and Comparative Analysis of Gate Stack Silicon Doped HfO2 Ferroelectric Vertical TFET

R Gupta, S Beg, S Singh - Silicon, 2022 - Springer
In this work, a gate stack Silicon doped HfO2 ferroelectric vertical TFET is proposed and its
various performance parameters are investigated and compared with the high-K HfO2 …

Performances of gate stacked heterojunction SELBOX and SOI tunnel FETs including interface trap charges: A simulation study

N Harsha, S Tiwari, R Chaudhary, R Saha - Materials Science and …, 2024 - Elsevier
In this work, the influence of interface trap charges (ITCs) on electrical parameters of gate
stacked heterojunction silicon on insulator Tunnel FET (GSHJ-SOITFET) and GSHJ-TFET on …

Heterostructure performance evaluation: A numerical simulation and analytical modeling of the ferroelectric pocket doped double gate tunnel FET

JE Jeyanthi, TSA Samuel, YS Song… - … Journal of Numerical …, 2024 - Wiley Online Library
This paper presents a novel 2D analytical model for investigating the influence of the
ferroelectric dielectric on the performance of pocket doped double gate tunnel FET. It takes …

Comprehensive investigation of radiofrequency/analog parameters in a ferroelectric tunnel field-effect transistor

R Saha, R Goswami, B Bhowmick… - … Science and Technology, 2022 - iopscience.iop.org
In this paper, the effect of ferroelectric (FE) layer thickness (t FE), coercive field (E c),
remnant polarization (P r) and saturation polarization (P s) on the transfer characteristic is …

Design and simulation of triple material gate InAs/Si Heterojunction TFET on SEL-BOX substrates: temperature impact analysis

AK Singh, MR Tripathy… - 2021 IEEE 4th …, 2021 - ieeexplore.ieee.org
In this study, we have reported TCAD assessment-based analyses of DC, RF/analog, and
linearity/intermodulation distortions of a triple-material-gate (TMG) electrode-based InAs/Si …