Abstract Large-scale Support Vector Machine (SVM) classification is a very active research
line in data mining. In recent years, several efficient SVM generation algorithms based on …

We examine a novel combination of architecture and algorithm for a packet switch controller
that incorporates an experimentally implemented optically interconnected neural network …

iSLIP and parallel hierarchical matching (PHM) are distributed maximal size matching
schedulers for input-buffered switches. Previous research has analyzed the hardware cost of …

The parallel hierarchical matching (PHM) algorithm is a distributed maximal size matching
scheduler for virtual output-queued switches. In a previous letter, we formulated an upper …

An optoelectronic neural network is presented that is designed to solve the assignment
problem—or any similar optimization task given minimal adjustment—in both crossbar and …

Input-queued packet switches are more scalable than output-queued ones. However, due to
HOL blocking, their throughput is poor. The virtual output queueing (VOQ) switch …

Input-buffered packet switches boosted with high-performance schedulers achieve near-
100% throughput. Several authors have proposed the use of neural schedulers. These …

In this paper, loss probabilities and steady state probabilities of data data packets for‎ an
asynchronous transfer mode (ATM) network are investigated under the buffer‎ division and …

High performance switching systems must cope with the continuing growth of IP traffic. We
can identify different related research areas: for instance, memory architectures, switching …