A first-order SCA resistant AES without fresh randomness
Since the advent of Differential Power Analysis (DPA) in the late 1990s protecting
embedded devices against Side-Channel Analysis (SCA) attacks has been a major …
embedded devices against Side-Channel Analysis (SCA) attacks has been a major …
Spin me right round rotational symmetry for FPGA-specific AES: Extended version
The effort in reducing the area of AES implementations has largely been focused on
application-specific integrated circuits (ASICs) in which a tower field construction leads to a …
application-specific integrated circuits (ASICs) in which a tower field construction leads to a …
Spin me right round: Rotational symmetry for FPGA-specific AES
The effort in reducing the area of AES implementations has largely been focused on
Application-Specific Integrated Circuits (ASICs) in which a tower field construction leads to a …
Application-Specific Integrated Circuits (ASICs) in which a tower field construction leads to a …
Optimized threshold implementations: Minimizing the latency of secure cryptographic accelerators
Threshold implementations have emerged as one of the most popular masking
countermeasures for hardware implementations of cryptographic primitives. In this work, we …
countermeasures for hardware implementations of cryptographic primitives. In this work, we …
Optimized threshold implementations: Securing cryptographic accelerators for low-energy and low-latency applications
Threshold implementations have emerged as one of the most popular masking
countermeasures for hardware implementations of cryptographic primitives. In this work, we …
countermeasures for hardware implementations of cryptographic primitives. In this work, we …
Low-latency masking with arbitrary protection order based on click elements
M Simões, L Bossuet, N Bruneau… - … Security and Trust …, 2023 - ieeexplore.ieee.org
Masking is the main countermeasure against side-channel attacks due to its sound formal
proof of security and the scalability of its protection parameters. However, effective masking …
proof of security and the scalability of its protection parameters. However, effective masking …
Self-Timed Masking Implementing First-Order Masked S-Boxes Without Registers
Passive physical attacks represent a threat to microelectronics systems by exploiting
leakages through side-channels, such as power consumption and electromagnetic …
leakages through side-channels, such as power consumption and electromagnetic …
A systematic design methodology of formally proven side-channel-resistant cryptographic hardware
This article proposes a formal design system for automatically generating provably secure
register transfer level description of cryptographic hardware based on generalized masking …
register transfer level description of cryptographic hardware based on generalized masking …
[PDF][PDF] Low-Latency Threshold Implementations for Side-Channel Protected Cryptographic Hardware
D Bozilov - 2023 - lirias.kuleuven.be
Current countermeasures against physical attacks on hardware implementations of
cryptographic primitives focus on specific attacks and therefore fail against combined (eg …
cryptographic primitives focus on specific attacks and therefore fail against combined (eg …
A note on masking generic Boolean functions
Masking is a popular countermeasure to protect cryptographic implementations against side-
channel attacks (SCA). In the literature, a myriad of proposals of masking schemes can be …
channel attacks (SCA). In the literature, a myriad of proposals of masking schemes can be …