Accurate power and performance models are needed to enable rapid, early system-level
analysis and optimization. There is, however, a lack of fast yet fine-grain power models of …

Virtual platform prototypes are widely utilized to enable early system-level design space
exploration. Accurate power models for hardware components at high levels of abstraction …

Several papers propose approaches based on power state machines (PSMs) for modelling
and simulating the power consumption of system-on-chips (SoCs). However, while they …

The increasing processing power of today's HW/SW platforms leads to the integration of
more and more functions in a single device. Additional design challenges arise when these …

Reduction of power consumption of digital systems is a major concern especially in modern
smart sensor systems. These systems are often only activated on request and their power …

With the predicted device, core, and multi-core scaling, a recent study revealed that
regardless of chip organization and topology, multi-core scaling is power limited. It has been …

In a chip design project, early design planning has a strong impact on the schedule and the
cost of design. Power estimation is part of early design planning, and it greatly affects design …

Platform-based design of embedded systems on a chip consists of the parallel functional
application specification, configuration of the hardware platform (ie connection of …

Due to the increasing algorithmic complexity of todays embedded systems, the
consideration of extra-functional properties becomes even more important. Extra-functional …

Consideration of an embedded system's timing behavior and power consumption at system-
level is an ambitious task. Sophisticated tools and techniques exist for power and timing …