Analytical review of noise margin in MVL: clarification of a deceptive matter
Multiple-valued logic (MVL) can lead to fewer interconnections inside and outside a chip. It
can also increase computational performance. Despite these intrinsic advantages, MVL …
can also increase computational performance. Despite these intrinsic advantages, MVL …
A new design paradigm for auto-nonvolatile ternary SRAMs using ferroelectric CNTFETs: From device to array architecture
Preserving the data stored in a static random access memory (SRAM) during power gating
or a sudden power outage is a necessary but costly need. This work proposes an …
or a sudden power outage is a necessary but costly need. This work proposes an …
A low-power single-ended SRAM in FinFET technology
This paper presents a single-ended low-power 7T SRAM cell in FinFET technology. This cell
enhances read performance by isolating the storage node from the read path. Moreover …
enhances read performance by isolating the storage node from the read path. Moreover …
An SEU-hardened ternary SRAM design based on efficient ternary C-elements using CNTFET technology
Ternary logic has been investigated for several years as it can provide substantial
advantages in reducing the complexity of operations and the number of interconnects. On …
advantages in reducing the complexity of operations and the number of interconnects. On …
Low-power and high-performance ternary SRAM designs with application to CNTFET technology
B Srinivasu, K Sridharan - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
This paper presents two efficient ternary SRAM designs appropriate for several transistor-
based technologies. The first design is based on the cycle operator in ternary logic while the …
based technologies. The first design is based on the cycle operator in ternary logic while the …
Efficient passive shielding of MWCNT interconnects to reduce crosstalk effects in multiple-valued logic circuits
MH Moaiyeri, ZM Taheri, MR Khezeli… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
In this paper, the effectiveness of passive shielding of multiwalled carbon nanotube
(MWCNT) bundle interconnects in reducing the crosstalk effects in carbon nanotube FET …
(MWCNT) bundle interconnects in reducing the crosstalk effects in carbon nanotube FET …
Comparative analysis of simultaneous switching noise effects in MWCNT bundle and Cu power interconnects in CNTFET-based ternary circuits
MR Khezeli, MH Moaiyeri… - IEEE Transactions on Very …, 2018 - ieeexplore.ieee.org
In this paper, the impacts of the simultaneous switching noise (SSN) in carbon nanotube
field effect transistor-based ternary circuits are investigated. These effects, including the …
field effect transistor-based ternary circuits are investigated. These effects, including the …
Systematic transistor sizing of a CNFET-based ternary inverter for high performance and noise margin enlargement
Noise and variation are the two major challenges for the reliability of digital circuits,
especially multiple-valued logic (MVL) circuits where the entire voltage range is divided into …
especially multiple-valued logic (MVL) circuits where the entire voltage range is divided into …
Reliable, high-performance, and nonvolatile hybrid SRAM/MRAM-based structures for reconfigurable nanoscale logic devices
Programmable logic devices (PLDs) based on static random access memory (SRAM) are
being used widely in digital design thanks to their infinite configurability and high …
being used widely in digital design thanks to their infinite configurability and high …
Single-End Half-Select Free Static RAM Cell Based on BWG CNFET Tri-value Buffer Gate Applicable in Highly Efficient IoT Platforms
In this study, a three-level static RAM cell with a single BL based on 16 nm BWG CNFET
technology is proposed for use in high-performance IoT platforms. The proposed memory …
technology is proposed for use in high-performance IoT platforms. The proposed memory …