A low area high speed FPGA implementation of AES architecture for cryptography application
Nowadays, a huge amount of digital data is frequently changed among different embedded
devices over wireless communication technologies. Data security is considered an important …
devices over wireless communication technologies. Data security is considered an important …
A robust chaotic map and its application to speech encryption in dual frequency domain
YB Huang, PW **e, JB Gao… - International Journal of …, 2023 - World Scientific
When chaotic systems are used for speech encryption, their chaotic performance largely
determines the security of speech encryption. However, traditional chaotic systems have …
determines the security of speech encryption. However, traditional chaotic systems have …
Enhancement process of AES: a lightweight cryptography algorithm-AES for constrained devices
HM Mohammad, AA Abdullah - … Computing Electronics and …, 2022 - telkomnika.uad.ac.id
The restricted devices have a small memory, simple processor, and limited power. To secure
them, we need lightweight cryptography algorithms, taking into account the limited …
them, we need lightweight cryptography algorithms, taking into account the limited …
A new ASIC implementation of an advanced encryption standard (AES) crypto-hardware accelerator
Single-chip hardware implementation of Advanced Encryption Standard (AES) offers a low-
power and low-area design that is suitable for portable devices. It is widely applicable for …
power and low-area design that is suitable for portable devices. It is widely applicable for …
A novel image encryption scheme based on a new hyperchaotic map
This paper proposes a robust chaotic encryption algorithm based on substitution and
permutation. We offer hyperchaotic maps with high ergodicity and large keyspace with a …
permutation. We offer hyperchaotic maps with high ergodicity and large keyspace with a …
[PDF][PDF] Implementation of image file security using the advanced encryption standard method
The application of technology in this era has entered digitalization and is modern. Therefore,
we are already in an era of advanced and rapid technological development. It has become a …
we are already in an era of advanced and rapid technological development. It has become a …
Power-efficient secured hardware design of aes algorithm on high performance fpga
With the expansion and growth of industries, the two major issues exist that affect both
civilization and the environment. Technology development has made it more difficult to …
civilization and the environment. Technology development has made it more difficult to …
[BOOK][B] Green Communication with Field-programmable Gate Array for Sustainable Development
The text discusses the designing of field-programmable gate array-based green computing
circuits for efficient green communication. It will help senior undergraduate, graduate …
circuits for efficient green communication. It will help senior undergraduate, graduate …
A modified AES based approach for data integrity and data origin authentication
MS Arman, S Al Mamun… - 2024 3rd International …, 2024 - ieeexplore.ieee.org
The importance of information security has significantly increased, making it a cornerstone
for safely storing and transmitting digital assets and sensitive information. Various …
for safely storing and transmitting digital assets and sensitive information. Various …
Handling Secret Key Compromise by Deriving Multiple Asymmetric Keys based on Diffie-Hellman Algorithm
A collection of connected things or nodes that collect information and send it through
communication channels is known as the Internet of Things (IoT). Maintaining the …
communication channels is known as the Internet of Things (IoT). Maintaining the …