Silent Data Corruption (SDC) can have negative impact on large-scale infrastructure
services. SDCs are not captured by error reporting mechanisms within a Central Processing …

Prior works typically conducted the fault analysis of neural network accelerator computing
arrays with simulation and focused on the prediction accuracy loss of the neural network …

Time-dependent dielectric breakdown (TDDB), in which the traps in oxide bulk form a
conducting path under application of stress voltage for long period of time, has emerged as …

The increasing hardware failures caused by the shrinking semiconductor technologies pose
substantial influence on the neural accelerators and improving the resilience of the neural …

The degradation of NMOS and PMOS transistors within CMOS inverters has been analyzed.
Channel-hot-carrier (CHC) degradation and/or bias temperature instabilities (BTIs) are …

With the continuous transistor scaling, device mismatch related to intrinsic process variability
increases and becomes one of the most important problems to be faced during circuit …

In this paper, a methodology to analyze the time dependent dielectric breakdown (TDDB)
reliability of CMOS analog and radio frequency (RF) circuits has been proposed and applied …

Integrated circuit performance and/or reliability can be compromised because of the time-
dependent variability observed in ultra-scaled devices, which arises from atomic scale …

Aspects of the disclosed technology include a method including extracting, by a processor, a
plurality of features from one from among a layout of a circuit, a netlist of the circuit, and the …

In this paper we first develop an analytic closed-form model for the failure probability (FP) of
a large digital circuit due to gate oxide breakdown. Our approach accounts for the fact that …