Impact strain engineering on gate stack quality and reliability

C Claeys, E Simoen, S Put, G Giusi, F Crupi - Solid-State Electronics, 2008 - Elsevier
Strain engineering based on either a global approach using high-mobility substrates or the
implementation of so-called processing-induced stressors has become common practice for …

[CARTE][B] Strained-Si heterostructure field effect devices

CK Maiti, S Chattopadhyay, LK Bera - 2007 - taylorfrancis.com
A combination of the materials science, manufacturing processes, and pioneering research
and developments of SiGe and strained-Si have offered an unprecedented high level of …

Nitride passivation of the interface between high-k dielectrics and SiGe

K Sardashti, KT Hu, K Tang, S Madisetti… - Applied Physics …, 2016 - pubs.aip.org
In-situ direct ammonia (NH 3) plasma nitridation has been used to passivate the Al 2 O
3/SiGe interfaces with Si nitride and oxynitride. X-ray photoelectron spectroscopy of the …

Comparison of SiGeC/SiGe/SiC–Si heterojunction based vertical nanowire FET using non equilibrium Green's function

R Ranjan, P Kumar, N Kumar - Micro and Nanostructures, 2024 - Elsevier
Advancement in FET technology has forced researchers to seek alternate semiconductor
devices and materials. TFETs, junctionless FETs, and nanowires are a few examples of …

[CARTE][B] Strain-engineered mosfets

CK Maiti, TK Maiti - 2012 - library.oapen.org
This book brings together new developments in the area of strain-engineered MOSFETs
using high-mibility substrates such as SIGe, strained-Si, germanium-on-insulator and III-V …

Sulfur passivation for the formation of Si-terminated Al2O3/SiGe (0 0 1) interfaces

K Sardashti, KT Hu, K Tang, S Park, H Kim… - Applied Surface …, 2016 - Elsevier
Sulfur passivation is used to electrically and chemically passivate the silicon–germanium
(SiGe) surfaces before and during the atomic layer deposition (ALD) of aluminum oxide (Al 2 …

[CARTE][B] Fundamentals of nanoscaled field effect transistors

A Chaudhry - 2013 - Springer
This book is an outcome of my research publications during my teaching and research
career. The book is about basic understanding of the MOSFET devices and their physics at …

Estimation of step-by-step induced stress in a sequential process integration of nano-scale SOS MOSFETs with high-k gate dielectrics

S Chatterjee, BN Chowdhury, A Das… - Semiconductor …, 2013 - iopscience.iop.org
The current work proposes a novel technique to incorporate process-induced uni-axial
stress for significant mobility boosting in high-performance metal–oxide–semiconductor field …

ALD deposited ZrO2 ultrathin layers on Si and Ge substrates: A multiple technique characterization

MA Botzakaki, N Xanthopoulos, E Makarona… - Microelectronic …, 2013 - Elsevier
In this study, a multiple characterization technique of ultrathin ZrO 2 films, deposited on high
mobility substrates such as strained-Si (s-Si) and p-type Ge (p-Ge) by Atomic Layer …

Sputter-deposited La2O3 on p-GaAs for gate dielectric applications

T Das, C Mahata, CK Maiti, GK Dalapati… - Journal of The …, 2011 - iopscience.iop.org
The interfacial and electrical properties of RF sputtered La 2 O 3 on p-GaAs substrates with
and without ultrathin Si interface passivation layer (IPL) are reported. X-ray photoelectron …