A 0.95-mW 6-b 700-MS/s single-channel loop-unrolled SAR ADC in 40-nm CMOS
This brief presents a low-power and high-speed single-channel successive approximation
register (SAR) analog-to-digital converter (ADC). It uses a loop-unrolled architecture with …
register (SAR) analog-to-digital converter (ADC). It uses a loop-unrolled architecture with …
A low power 10 bit SAR ADC with variable threshold technique for biomedical applications
This paper presents two low power design techniques used for successive approximation
registers (SAR) analog-to-digital converter (ADC) for transmission of Physiological signal …
registers (SAR) analog-to-digital converter (ADC) for transmission of Physiological signal …
An adaptive-resolution signal-specific ADC for sensor-interface applications
M Nasserian, A Peiravi, F Moradi - Analog Integrated Circuits and Signal …, 2019 - Springer
In this paper, a signal-specific analog-to-digital converter (ADC) with a new structure is
proposed, in which the resolution of the ADC is adaptively adjusted by the activity of the …
proposed, in which the resolution of the ADC is adaptively adjusted by the activity of the …
A 10-bit 33.3-kS/s 3.2-fJ/conversion-step single-ended counter-type SAR ADC with dual 5-bit CDAC arrays and counters in 65-nm CMOS
A Tehranian, A Peiravi - AEU-International Journal of Electronics and …, 2024 - Elsevier
In this paper, an area-and-energy-efficient 10-bit single-ended (SE) counter-type (CT)
analog-to-digital converter (ADC) with dual 5-bit capacitive digital-to-analog converter (DAC) …
analog-to-digital converter (ADC) with dual 5-bit capacitive digital-to-analog converter (DAC) …
OTA-free MASH 2–2 noise sha** SAR ADC: System and design considerations
A multi-stage noise sha** (MASH) analog to digital converter (ADC) architecture is
presented in this paper. This architecture combines the features of noise sha** SAR (NS …
presented in this paper. This architecture combines the features of noise sha** SAR (NS …
A 12 bit 76MS/s SAR ADC with a Capacitor Merged Technique in 0.18 µm CMOS Technology
S Mahdavi - Journal of Electrical and Computer Engineering …, 2017 - jecei.sru.ac.ir
A new high-resolution and high-speed fully differential Successive Approximation Register
(SAR) Analog to Digital Converter (ADC) based on Capacitor Merged Technique is …
(SAR) Analog to Digital Converter (ADC) based on Capacitor Merged Technique is …
A new 13-bit 100MS/s full differential successive approximation register analog to digital converter (SAR ADC) using a novel compound R-2R/C structure
S Mahdavi, E Ghadimi - 2017 IEEE 4th international conference …, 2017 - ieeexplore.ieee.org
A novel and reliable high-resolution and high-speed SAR ADC is presented in this paper. In
the proposed article, a new compound R-2R/C structure is utilized in order to achieve both …
the proposed article, a new compound R-2R/C structure is utilized in order to achieve both …
An SAR ADC switching scheme with MSB prediction for a wide input range and reduced reference voltage
Z Fu, KP Pun - IEEE Transactions on Very Large Scale …, 2018 - ieeexplore.ieee.org
This paper proposes a new most significant bit (MSB)-prediction switching scheme and
presents an energy-efficient successive approximation register (SAR) analog-to-digital …
presents an energy-efficient successive approximation register (SAR) analog-to-digital …
An ultra high-resolution low propagation delay time and low power with 1.25 GS/s CMOS dynamic latched comparator for high-speed SAR ADCs in 180nm technology
S Mahdavi, M Jafarzadeh, M Poreh… - 2017 IEEE 4th …, 2017 - ieeexplore.ieee.org
In this paper, a new reliable high-resolution and high-speed dynamic latched type
comparator with offset cancellation mechanism is presented. The proposed paper presents …
comparator with offset cancellation mechanism is presented. The proposed paper presents …
[PDF][PDF] Design of low power SAR ADC with novel regenerative comparator
A Sajja, S Rooban - Wseas Trans Circ Syst, 2023 - wseas.com
This paper introduces two low-power design techniques for a successive approximation
register (SAR) analog-to-digital converter (ADC) used in transmitting physiological signals …
register (SAR) analog-to-digital converter (ADC) used in transmitting physiological signals …