The authors address the problem of validating the dependability of fault-tolerant computing
systems, in particular, the validation of the fault-tolerance mechanisms. The proposed …

The authors describe a dependability evaluation method based on fault injection that
establishes the link between the experimental evaluation of the fault tolerance process and …

This paper discusses the problems of pin-level fault injection for dependability validation
and presents the architecture of a pin-level fault injector called RIFLE. This system can be …

Systems designed for reliability must be validated through simulations. However, traditional
SPICE like simulators or even mixed-mode simulators are too slow for the task of simulating …

Mixed analog and digital mode simulators have been available for accurate/spl alpha/-
particle-induced transient fault simulation. However, they are not fast enough to simulate a …

This study addresses the use of fault injection for explicitly removing design/implementation
faults in complex fault-tolerance algorithms and mechanisms (FTAM), viz, fault-tolerance …

FOCUS, a simulation environment for conducting fault-sensitivity analysis of chip-level
designs, is described. The environment can be used to evaluate alternative design tactics at …

High fault tolerance for transient faults and low-power consumption are key objectives in the
design of critical embedded systems. Systems like smart cards, PDAs, wearable computers …

To study the effect of transient faults in large digital circuits, a simulation tool called
DYNAMO has been developed. It allows transient faults to be introduced in a circuit during a …

Abstract Effects of gate-level faults on program behavior are described and used as a basis
for fault models at the program level. A simulation model of the IBM RT PC was developed …