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Reliable on-chip systems in the nano-era: Lessons learnt and future trends
Reliability concerns due to technology scaling have been a major focus of researchers and
designers for several technology nodes. Therefore, many new techniques for enhancing and …
designers for several technology nodes. Therefore, many new techniques for enhancing and …
Selective hardening: Toward cost-effective error tolerance
As ICs shrink into the nanometer range, they are increasingly subject to errors induced by
physical faults. Traditional hardening for error mitigation consumes too much area and …
physical faults. Traditional hardening for error mitigation consumes too much area and …
Functional safety methodologies for automotive applications
Safety-critical automotive applications have stringent demands for functional safety and
reliability. Traditionally, functional safety requirements have been managed by car …
reliability. Traditionally, functional safety requirements have been managed by car …
[HTML][HTML] Fault injection emulation for systems in FPGAs: Tools, techniques and methodology, a tutorial
Communication systems that work in jeopardized environments such as space are affected
by soft errors that can cause malfunctions in the behavior of the circuits such as, for example …
by soft errors that can cause malfunctions in the behavior of the circuits such as, for example …
[HTML][HTML] A fault tolerant voter for approximate triple modular redundancy
Approximate Triple Modular Redundancy has been proposed in the literature to overcome
the area overhead issue of Triple Modular Redundancy (TMR). The outcome of …
the area overhead issue of Triple Modular Redundancy (TMR). The outcome of …
A simple fault-tolerant digital voter circuit in TMR nanoarchitectures
Nanoelectronic systems are now more and more prone to faults and defects, permanent or
transient. Redundancy techniques are implemented widely to increase the reliability …
transient. Redundancy techniques are implemented widely to increase the reliability …
Partial TMR for improving the soft error reliability of SRAM-based FPGA designs
Triple modular redundancy (TMR) is a single-event upset (SEU)-mitigation technique that
uses three circuit copies to mask a failure in any one copy. It improves the soft error reliability …
uses three circuit copies to mask a failure in any one copy. It improves the soft error reliability …
Selective SWIFT-R: A flexible software-based technique for soft error mitigation in low-cost embedded systems
Commercial off-the-shelf microprocessors are the core of low-cost embedded systems due
to their programmability and cost-effectiveness. Recent advances in electronic technologies …
to their programmability and cost-effectiveness. Recent advances in electronic technologies …
Evaluating reduced resolution redundancy for radiation hardening in fpga designs
Radiation hardening by design (RHBD) is traditionally performed using triple modular
redundancy (TMR), a very effective technique that introduces high overheads in terms of …
redundancy (TMR), a very effective technique that introduces high overheads in terms of …
Low-cost scan-chain-based technique to recover multiple errors in TMR systems
In this paper, we present a scan-chain-based multiple error recovery technique for triple
modular redundancy (TMR) systems (SMERTMR). The proposed technique reuses scan …
modular redundancy (TMR) systems (SMERTMR). The proposed technique reuses scan …