It is widely recognized that nanoscience and nanotechnology and their subfields, such as
nanophotonics, nanoelectronics, and nanomechanics, have had a tremendous impact on …

This paper presents a 28-nm system-on-chip (SoC) for Internet of things (IoT) applications
with a programmable accelerator design that implements a powerful fully connected deep …

This paper presents a comprehensive review of near-threshold wide-voltage designs on
memory, resilient logic designs, low voltage Radio Frequency (RF) circuits, and timing …

This paper presents a near-threshold operating voltage timing error detecting 32-bit
microcontroller system. The lightweight in situ error detection and correction technique uses …

This article presents a timing error detection and correction (EDaC) technique optimized for
near-/sub-threshold operation to recover energy lost in the conventional signoff margins …

This article presents the design, implementation methodology, and validation of a multi-bit
flip-flop (FF) system that provides tolerance against single-event upsets (SEUs) and single …

Aggressive technology scaling and increased static and dynamic variability caused by
process, temperature, voltage, and aging effects make nanometer circuits prone to timing …

Resilient circuits with timing error detection and correction (EDAC) can eliminate the excess
timing margin but suffer from miss detection risk due to inactivation of the critical paths. We …

In situ timing monitoring of critical paths (CPs) can help eliminate the excess timing margin
but suffer from miss detection risk because the CPs might not be activated. However, indirect …

Increasing variability of transistor parameters in nanoscale era renders modern circuits
prone to timing failures. To address such failures, designers adopt pessimistic timing/voltage …