APOLLO: An automated power modeling framework for runtime power introspection in high-volume commercial microprocessors
Z ** extremely efficient runtime on-chip power meters
Accurate and efficient on-chip power modeling is crucial to runtime power, energy, and
voltage management. Such power monitoring can be achieved by designing and integrating …
voltage management. Such power monitoring can be achieved by designing and integrating …
Strober: Fast and accurate sample-based energy simulation for arbitrary RTL
This paper presents a sample-based energy simulation methodology that enables fast and
accurate estimations of performance and average power for arbitrary RTL designs. Our …
accurate estimations of performance and average power for arbitrary RTL designs. Our …
Early stage real-time SoC power estimation using RTL instrumentation
J Yang, L Ma, K Zhao, Y Cai… - The 20th Asia and South …, 2015 - ieeexplore.ieee.org
Early stage power estimation is critical for SoC architecture exploration and validation in
modern VLSI design, but real-time, long time interval and accurate estimation is still …
modern VLSI design, but real-time, long time interval and accurate estimation is still …
PrEsto: An FPGA-accelerated power estimation methodology for complex systems
Reduced or bounded power consumption has become a first-order requirement for modern
hardware design. As a design progresses and more detailed information becomes …
hardware design. As a design progresses and more detailed information becomes …
Full-system chip multiprocessor power evaluations using FPGA-based emulation
A Bhattacharjee, G Contreras, M Martonosi - Proceedings of the 2008 …, 2008 - dl.acm.org
The design process for chip multiprocessors (CMPs) requires extremely long simulation
times to explore performance, power, and thermal issues, particularly when operating …
times to explore performance, power, and thermal issues, particularly when operating …
[ΒΙΒΛΙΟ][B] A highly productive implementation of an out-of-order processor generator
CP Celio - 2017 - search.proquest.com
General-purpose serial-thread performance gains have become more difficult for industry to
realize due to the slowing down of process improvements. In this new regime of poor …
realize due to the slowing down of process improvements. In this new regime of poor …
SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs
O Chatzopoulos, M Trakosa… - … Analysis of Systems …, 2024 - ieeexplore.ieee.org
Building on the flexibility of open-source RISC-V-based CPU designs at the register-transfer
level (RTL) we deliver a characterization study that is not feasible on commercial CPUs. We …
level (RTL) we deliver a characterization study that is not feasible on commercial CPUs. We …