A 0.5–1 V,− 68 dB power supply rejection capacitorless analog LDO using voltage-to-time conversion in 28-nm CMOS
JH Jang, HD Gwon, TH Kong, JH Yang… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
This article proposes an analog low-dropout (LDO) regulator using the voltage-to-time
conversion technique to achieve high power-supply-rejection (PSR) at low supply voltages …
conversion technique to achieve high power-supply-rejection (PSR) at low supply voltages …
A multipath output-capacitor-less LDO regulator
SK Kao, JJ Chen, CH Liao - IEEE Access, 2022 - ieeexplore.ieee.org
A multipath output-capacitor-less low-dropout (OCL-LDO) regulator with feedforward path
compensation is presented to achieve low power consumption and fast transient response …
compensation is presented to achieve low power consumption and fast transient response …
A push-pull FVF based LDO voltage regulator with slew rate enhancement at the gate of power transistor
MM Boanloo, M Yavari - Microelectronics Journal, 2022 - Elsevier
A low-dropout (LDO) voltage regulator based on a push-pull flipped voltage follower cell
with slew rate improvement at the gate of power transistor is presented. The proposed three …
with slew rate improvement at the gate of power transistor is presented. The proposed three …
A 0.5–1-V Time–Voltage Hybrid Domain Dual-Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm
JH Jang, HD Gwon, S Yoo, JH Yang… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
This article presents a time and voltage hybrid domain (HD) nested dual-loop analog low-
dropout (LDO) regulator that achieves both wide-frequency-range high power supply …
dropout (LDO) regulator that achieves both wide-frequency-range high power supply …
A wideband high-PSR OCL LDO using a gain-relaxed OTA featuring dynamic complex zeros frequency compensation
This article proposes an Output-Capacitor-Less (OCL) Low-Dropout (LDO) regulator with an
assisted positive feedback loop technique, which mimics a negative resistance, along with a …
assisted positive feedback loop technique, which mimics a negative resistance, along with a …
A design of high voltage pre-regulator circuit for LED driver
J Tang, C Dai, L Ouyang, Y Wang… - 2021 9th International …, 2021 - ieeexplore.ieee.org
An internal pre-regulator circuit used in high voltage LED driver circuit is presented to
provide stable power supply voltage input for the low voltage module in the system. The …
provide stable power supply voltage input for the low voltage module in the system. The …
A Fast-Transient Output-Capacitor-Less Low-Dropout Regulator With Direct-Coupled Slew Rate Enhancement
SK Kao, JJ Chen, CH Liao, YJ Lu, JC Wang - IEEE Access, 2024 - ieeexplore.ieee.org
An output capacitorless low-dropout (OCL-LDO) regulator with a direct-coupled slew rate
enhancement (DCSRE) technique. This paper proposes a low-dropout regulator with a …
enhancement (DCSRE) technique. This paper proposes a low-dropout regulator with a …
A 0.5 V inverter-based analog output-capacitorless low-dropout regulator with bulk-driven transient-enhancing paths
J Lee, PK Chan - 2022 11th International Conference on …, 2022 - ieeexplore.ieee.org
This paper presents a 0.5 V output-capacitorless low-dropout (OCL-LDO) regulator. The
proposed regulator includes the design of a deep-subthreshold-biased push-pull input …
proposed regulator includes the design of a deep-subthreshold-biased push-pull input …
A Nested Miller Compensation with a large feed-forward transconductor for capacitor-less flipped voltage follower low dropout regulator
In this paper, a capacitor-less flipped voltage follower (FVF) low dropout (LDO) regulator
using nested miller compensation with a large feed-forward transconductor (NMCLFT) is …
using nested miller compensation with a large feed-forward transconductor (NMCLFT) is …
A 0.6 V 150mA 4-stage output-capacitorless LDO regulator using feedforward with embedded Miller-RC compensation
J Lee, PK Chan - … IEEE International Symposium on Circuits and …, 2022 - ieeexplore.ieee.org
This paper presents an ultra-low supply 4-stage output-capacitorless low-dropout (LDO)
regulator using a TSMC 40nm process. A novel frequency compensation scheme, which is …
regulator using a TSMC 40nm process. A novel frequency compensation scheme, which is …