[HTML][HTML] Offset voltage reduction in two-stage folded-cascode operational amplifier using high-precision source degeneration

C Stancu, A Neacsu, T Ionescu, C Stanescu… - Electronics, 2023 - mdpi.com
The demand for CMOS precision operational amplifiers for critical applications has
continuously increased over time due to higher accuracy and sensitivity requirements …

Super-gain-boosted AB-AB fully differential miller Op-Amp with 156dB open-loop gain and 174MV/V MHz pF/μW figure of merit in 130nm CMOS technology

A Paul, J Ramirez-Angulo, AD Sanchez… - IEEE …, 2021 - ieeexplore.ieee.org
A fully differential Miller op-amp with a composite input stage using resistive local common-
mode feedback and regulated cascode transistors is presented here. High gain pseudo …

Design of high-speed low power CMOS operational amplifier utilizing 0.18-µm technology for ADC applications

SAZ Murad, FA Bakar, IAA Jasri, TZA Zulkifli… - AIP Conference …, 2023 - pubs.aip.org
This paper presents a design of high-speed low power CMOS operational amplifier utilizing
0.18-µm technology for ADC applications. A folded cascode with PMOS configuration is …

High resolution temperature sensor signal processing ASIC for cryo-cooler electronics

A Srivastava, N Kumar, NR Mohapatra… - … Symposium on VLSI …, 2022 - Springer
Infra-Red sensor requirements for high-resolution imaging satellites are increasing in future
missions. IR sensors working in LWIR and MWIR regions have an inbuilt cryo-cooler as they …

A high current efficiency rail-to-rail operational amplifier

X Wang, X Zhao, L Dong, L Yu - International Journal of Electronics, 2024 - Taylor & Francis
This paper proposes a new single stage high current efficiency rail to rail amplifier (HCE-
RTR). Due to the combination of a new constant transconductance control circuit and local …

Maximizing Temperature and Process Corner Performance of Operational Amplifiers with a Novel Self-Adjusting Biasing Technique

T Mai, A Hagelauer, R Weigel - 2018 Austrochip Workshop on …, 2018 - ieeexplore.ieee.org
A novel self-adjusting biasing technique for current sources in CMOS operational amplifiers
is presented. The method is deduced from the fundamental characteristics of a mosfet and a …

Design of a 2 mW Power, 112 dB Gain-Boosted, Folded Cascode Amplifier in 0.18 µm Process

S Sarkar, A Ghosh, T Chatterjee - 2021 IEEE 30th International …, 2021 - ieeexplore.ieee.org
In this literature, a gain-boosted folded cascode fully differential amplifier with a common-
mode feedback circuit (CMFB) is developed based on the 0.18 µm, 1.8 V CMOS process …

Diseño de amplificadores CMOS usando gm/ID y su uso como un sistema de primer orden

VHA Palma, FS Ibarra - Revista Mexicana de Física, 2024 - rmf.smf.mx
This paper presents the analysis and design of CMOS differential amplifiers using the first-
order approach and sizing the transistors with the gm/ID methodology. The design of four …

[PDF][PDF] Offset Voltage Reduction in Two-Stage Folded-Cascode Operational Amplifier Using High-Precision Source Degeneration. Electronics 2023, 12, 4534

C Stancu, A Neacsu, T Ionescu, C Stanescu… - 2023 - academia.edu
The demand for CMOS precision operational amplifiers for critical applications has
continuously increased over time due to higher accuracy and sensitivity requirements …

基于单一 PMOS 差分对的轨到轨输入运算 放大器设计.

杨九川, 杨发顺, 马奎 - Electronic Components & Materials, 2023 - search.ebscohost.com
基于国内某CMOS 工艺设计了一种单一PMOS 差分对的轨到轨输入, 恒跨导CMOS 运算放大器.
输入级电路采用折叠共源共栅结构, 通过体效应动态调节输入管的阈值电压扩展共模输入范围到 …