Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
DH Wells, MK Abatchev - US Patent 7,611,980, 2009 - Google Patents
Single spacer processes for multiplying pitch by a factor greater than two are provided. In
one embodiment, n, where n≧ 2, tiers of stacked mandrels are formed over a substrate …
one embodiment, n, where n≧ 2, tiers of stacked mandrels are formed over a substrate …
Mask material conversion
MK Abatchev, G Sandhu - US Patent 7,910,288, 2011 - Google Patents
The dimensions of mask patterns, such as pitch-multiplied spacers, are controlled by
controlled growth of features in the patterns after they are formed. To form a pattern of pitch …
controlled growth of features in the patterns after they are formed. To form a pattern of pitch …
Simplified pitch doubling process flow
A Niroomand, B Zhou, R Alapati - US Patent 7,732,343, 2010 - Google Patents
A method for fabricating a semiconductor device comprises patterning a layer of photoresist
material to form a plurality of mandrels. The method further comprises depositing an oxide …
material to form a plurality of mandrels. The method further comprises depositing an oxide …
Spacer process for on pitch contacts and related structures
G Sandhu, M Kiehlbauch, S Kramer… - US Patent 7,737,039, 2010 - Google Patents
Methods are disclosed, such as those involving increasing the density of isolated features in
an integrated circuit. Also disclosed are structures associated with the methods. In one or …
an integrated circuit. Also disclosed are structures associated with the methods. In one or …
Multiple deposition for integration of spacers in pitch multiplication process
J Bai, GS Sandhu, S Meng - US Patent 8,123,968, 2012 - Google Patents
Pitch multiplication is performed using a two step process to deposit spacer material on
mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier …
mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier …
Methods of fabricating substrates
S Sills, GS Sandhu, A Devilliers - US Patent 8,273,634, 2012 - Google Patents
US8273634B2 - Methods of fabricating substrates - Google Patents US8273634B2 -
Methods of fabricating substrates - Google Patents Methods of fabricating substrates …
Methods of fabricating substrates - Google Patents Methods of fabricating substrates …
Methods for device fabrication using pitch reduction
LC Tran, R Giridhar - US Patent 8,980,756, 2015 - Google Patents
BACKGROUND As a consequence of many factors, including demand for increased
portability, computing power, memory capacity and energy efficiency, electronic devices …
portability, computing power, memory capacity and energy efficiency, electronic devices …
Method of fabricating semiconductor device
K Matsuzaki - US Patent 7,985,682, 2011 - Google Patents
US7985682B2 - Method of fabricating semiconductor device - Google Patents US7985682B2 -
Method of fabricating semiconductor device - Google Patents Method of fabricating …
Method of fabricating semiconductor device - Google Patents Method of fabricating …
Methods for forming arrays of small, closely spaced features
M Abatchev, G Sandhu - US Patent 7,429,536, 2008 - Google Patents
US7429536B2 - Methods for forming arrays of small, closely spaced features - Google Patents
US7429536B2 - Methods for forming arrays of small, closely spaced features - Google Patents …
US7429536B2 - Methods for forming arrays of small, closely spaced features - Google Patents …
Method and apparatus for adjusting feature size and position
DH Wells - US Patent 7,396,781, 2008 - Google Patents
US7396781B2 - Method and apparatus for adjusting feature size and position - Google Patents
US7396781B2 - Method and apparatus for adjusting feature size and position - Google Patents …
US7396781B2 - Method and apparatus for adjusting feature size and position - Google Patents …