4,609,986 A 9, 1986 Hartmann et al. 4,706,216 A 11/1987 Carter 4,761,768 A 8, 1988
Turner et al. 4,831,573 A 5/1989 Norman 4,864,161 A 9, 1989 Norman et al. 4,870,302 A 9 …

(57) ABSTRACT A three-dimensional semiconductor device, comprising: a first module layer
having a plurality of circuit blocks; and a second module layer positioned substantially …

(57) ABSTRACT A cell circuit and corresponding layout is disclosed to include linear-
shaped diffusion fins defined to extend over a Substrate in a first direction so as to extend …

Related US Application Data(74) Attorney, Agent, or Firm-Perkins Coie LLP (63)
Continuation-in-part of application No. 10/765,802, filed on Jan. 26, 2004, now Pat. No …

H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …

(57) ABSTRACT A restricted layout region includes a diffusion level layout including p-type
and n-type diffusion region layout shapes separated by a central inactive region. The …

5,923,059 A 7/1999 Gheewala................... 257/204 of the substrate. The semiconductor
device includes a number of linear gate electrode tracks de? ned to extend over the …

(57) ABSTRACT A restricted layout region is defined to include a diffusion level layout that
includes a plurality of diffusion region layout shapes to be formed within a portion of a …

(57) ABSTRACT A semiconductor device is disclosed as having a substrate portion that
includes a plurality of diffusion regions that include at least one p-type diffusion region and …

(57) ABSTRACT A restricted layout region in a layout of a semiconductor device is disclosed
to include a diffusion level layout includ ing a plurality of diffusion region layout shapes. The …