This paper describes a digital logic architecture for'CMOL'hybrid circuits which combine a
semiconductor–transistor (CMOS) stack and two levels of parallel nanowires, with molecular …

This chapter is a brief review of the recent work on various aspects of the prospective hybrid
semiconductor/nanowire/molecular (“CMOL”) integrated circuits. The basic idea of such …

Motivated by the need for economical fault-tolerant designs for nanoarchitectures, we
explore a novel multiplexing-based redundant design scheme at small (/spl les/100) and …

This book is intended to give a general overview of reliability, faults, fault models,
nanotechnology, nanodevices, fault-tolerant architectures and reliability evaluation …

In the emerging nanotechnologies, faulty components may be an integral part of a system.
For the system to be reliable, the error of the building blocks has to be smaller than a …

Nanoelectronic systems are anticipated to be highly susceptible to computation and
communication noise. Interestingly, von Neumann addressed the issue of computation in the …

Scaling the CMOS devices deep into the nanorange reduces their reliability margins
significantly. Consequently, accurately calculating the reliability of digital nanocircuits is …

This work presents a novel architecture, which is both device and circuit independent. The
starting idea is that computations can be performed in three fundamentally different ways …

Introducing redundancy at the device-level has been proposed as the most effective way to
improve reliability. With the remarkable reliability of the complementary metal oxide …

This chapter will start with a brief review of nanoelectronic challenges while focusing on the
reliability challenge. One of the most recent call-to-arms [1] raises two fundamental …